Patent classifications
C30B33/02
PROCESS FOR PREPARING EPITAXY WAFER AND EPITAXY WAFER THEREFROM
The present application provides a process for preparing an epitaxy wafer, and an epitaxy wafer prepared therefrom. The process comprises: step S1: providing a semiconductor substrate wafer, conducting an epitaxy process and forming an epitaxy layer on the wafer; and step S2: conducting a thermal treatment to the wafer to eliminate the haze pattern of the epitaxy layer. According to the process, the thermal treatment after the epitaxy process can facilitate the orientation of atoms on the wafer surface toward the lowest energy orientation, so that the atoms of the epitaxy layer arrange and accumulate uniformly. Therefore, the haze pattern on the wafer surface can be eliminated.
Passivation of nonlinear optical crystals
The passivation of a nonlinear optical crystal for use in an inspection tool includes growing a nonlinear optical crystal in the presence of at least one of fluorine, a fluoride ion and a fluoride-containing compound, mechanically preparing the nonlinear optical crystal, performing an annealing process on the nonlinear optical crystal and exposing the nonlinear optical crystal to a hydrogen-containing or deuterium-containing passivating gas.
Passivation of nonlinear optical crystals
The passivation of a nonlinear optical crystal for use in an inspection tool includes growing a nonlinear optical crystal in the presence of at least one of fluorine, a fluoride ion and a fluoride-containing compound, mechanically preparing the nonlinear optical crystal, performing an annealing process on the nonlinear optical crystal and exposing the nonlinear optical crystal to a hydrogen-containing or deuterium-containing passivating gas.
Large aluminum nitride crystals with reduced defects and methods of making them
Reducing the microvoid (MV) density in AlN ameliorates numerous problems related to cracking during crystal growth, etch pit generation during the polishing, reduction of the optical transparency in an AlN wafer, and, possibly, growth pit formation during epitaxial growth of AlN and/or AlGaN. This facilitates practical crystal production strategies and the formation of large, bulk AlN crystals with low defect densities—e.g., a dislocation density below 10.sup.4 cm.sup.−2 and an inclusion density below 10.sup.4 cm.sup.−3 and/or a MV density below 10.sup.4 cm.sup.−3.
Large aluminum nitride crystals with reduced defects and methods of making them
Reducing the microvoid (MV) density in AlN ameliorates numerous problems related to cracking during crystal growth, etch pit generation during the polishing, reduction of the optical transparency in an AlN wafer, and, possibly, growth pit formation during epitaxial growth of AlN and/or AlGaN. This facilitates practical crystal production strategies and the formation of large, bulk AlN crystals with low defect densities—e.g., a dislocation density below 10.sup.4 cm.sup.−2 and an inclusion density below 10.sup.4 cm.sup.−3 and/or a MV density below 10.sup.4 cm.sup.−3.
Passivation of nonlinear optical crystals
A laser system includes a nonlinear optical (NLO) crystal, wherein the NLO crystal is annealed within a selected temperature range. The NLO crystal is passivated with at least one of hydrogen, deuterium, a hydrogen-containing compound or a deuterium-containing compound to a selected passivation level. The system further includes at least one light source, wherein at least one light source is configured to generate light of a selected wavelength and at least one light source is configured to transmit light through the NLO crystal. The system further includes a crystal housing unit configured to house the NLO crystal.
Passivation of nonlinear optical crystals
A laser system includes a nonlinear optical (NLO) crystal, wherein the NLO crystal is annealed within a selected temperature range. The NLO crystal is passivated with at least one of hydrogen, deuterium, a hydrogen-containing compound or a deuterium-containing compound to a selected passivation level. The system further includes at least one light source, wherein at least one light source is configured to generate light of a selected wavelength and at least one light source is configured to transmit light through the NLO crystal. The system further includes a crystal housing unit configured to house the NLO crystal.
Composite substrate and manufacturing method thereof
A composite substrate including a substrate and an aluminum nitride layer is provided. The aluminum nitride layer is disposed on a top surface of the substrate. Silicon is doped in the aluminum nitride layer to regulate residual stress, a film thickness of the aluminum nitride layer is less than 3.5 μm, a defect density of the aluminum nitride layer is less than or equal to 5×10.sup.9/cm.sup.2, and a root mean square roughness of the top surface, facing away from the substrate, of the aluminum nitride layer is less than 3 nm. A manufacturing method of a composite substrate is also provided.
Composite substrate and manufacturing method thereof
A composite substrate including a substrate and an aluminum nitride layer is provided. The aluminum nitride layer is disposed on a top surface of the substrate. Silicon is doped in the aluminum nitride layer to regulate residual stress, a film thickness of the aluminum nitride layer is less than 3.5 μm, a defect density of the aluminum nitride layer is less than or equal to 5×10.sup.9/cm.sup.2, and a root mean square roughness of the top surface, facing away from the substrate, of the aluminum nitride layer is less than 3 nm. A manufacturing method of a composite substrate is also provided.
METHOD FOR HEAT-TREATING SILICON WAFER
Provided is a method for heat-treating a silicon wafer in an inert gas atmosphere, wherein it is possible to discharge SiO gas produced in melting a natural oxide film on the surface of the silicon wafer efficiently, to suppress the accumulation of reaction products in the heat treatment chamber, and to prevent slip deterioration. The wafer is held for a period of 5 to 30 sec inclusive, the rotational speed of the wafer is set to 80 to 120 rpm, and further the inert gas supply in the chamber is controlled so that the gas replacement rate is 90% or more in a temperature range of 900 to 1100° C. inclusive.