A device includes a semiconductor substrate containing gallium nitride and having a crystal face inclined from 0.05 to 15 inclusive with respect to the c-plane. The semiconductor substrate includes an irregular portion on the crystal face, and the contact angle of pure water having a specific resistance of 18 M.Math.cm or more on the surface of the irregular portion is 10 or less.

Materials, products, methods of use and fabrication thereof are disclosed. The materials are particularly well suited for application in products such as superconducting devices and quantum computing, due to ability to avoid undesirable effects from inherent noise and decoherence. The materials are formed from select isotopes having zero nuclear spin into a single crystal-phase film or layer of thickness depending on the desired application of the resulting device. The film/layer may be suspended or disposed on a substrate. The isotopes may be enriched from naturally-occurring sources of isotopically mixed elemental material(s). The single crystal is preferably essentially devoid of structural defects such as grain boundaries, inclusions, impurities and lattice vacancies.

The method comprises contacting a silicon substrate with a silver salt and an acid for a time effective to produce spikes having a first end disposed on the silicon substrate and a second end extending away from the silicon substrate. The spikes have a second end diameter of about 10 nm to about 200 nm, a height of about 100 nm to 10 micrometers, and a density of about 10 to 100 per square microns. The nanostructures provide antimicrobial properties and can be transferred to the surface of various materials such as polymers.

Embodiments described herein provide processes for forming and removing epitaxial films and materials from growth wafers by epitaxial lift off (ELO) processes. In some embodiments, the growth wafer has edge surfaces with an off-axis orientation which is utilized during the ELO process. The off-axis orientation of the edge surface provides an additional variable for controlling the etch rate during the ELO process and therefore the etch front may be modulated to prevent the formation of high stress points which reduces or prevents stressing and cracking the epitaxial film stack. In one embodiment, the growth wafer is rectangular and has an edge surface with an off-axis orientation rotated by an angle greater than 0 and up to 90 relative to an edge orientation of <110> at 0.

Disclosed herein are methods to eliminate or reduce the peeling-off of epitaxial lifted-off thin film epilayers on secondary host substrates that allow for the fabrication of high yield ELO processed thin film devices. The methods employ patterned strain-relief trenches.

A method of manufacturing a substrate includes forming a support structure by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core in a first adhesion shell, encapsulating the first adhesion shell in a conductive shell, encapsulating the conductive shell in a second adhesion shell, and encapsulating the second adhesion shell in a barrier shell. The method also includes joining a bonding layer to the support structure, joining a substantially single crystalline silicon layer to the bonding layer, forming an epitaxial silicon layer by epitaxial growth on the substantially single crystalline silicon layer, and forming one or more epitaxial III-V layers by epitaxial growth on the epitaxial silicon layer.

A method of manufacturing a substrate includes forming a support structure by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core in a first adhesion shell, encapsulating the first adhesion shell in a conductive shell, encapsulating the conductive shell in a second adhesion shell, and encapsulating the second adhesion shell in a barrier shell. The method also includes joining a bonding layer to the support structure, joining a substantially single crystalline silicon layer to the bonding layer, forming an epitaxial silicon layer by epitaxial growth on the substantially single crystalline silicon layer, and forming one or more epitaxial III-V layers by epitaxial growth on the epitaxial silicon layer.

A method is disclosed for reducing the size and density of defects in a single crystal silicon wafer. The method involves subjected a single crystal silicon ingot to an anneal prior to wafer slicing.

A method is disclosed for reducing the size and density of defects in a single crystal silicon wafer. The method involves subjected a single crystal silicon ingot to an anneal prior to wafer slicing.

Materials, devices, methods of use and fabrication thereof are disclosed. The materials are particularly well suited for application in superconducting devices and quantum computing, due to ability to avoid undesirable effects from inherent noise and decoherence. The materials are formed from select isotopes having zero nuclear spin into a single crystal-phase film or layer of thickness depending on the desired application of the resulting device. The film/layer may be suspended or disposed on a substrate. The isotopes may be enriched from naturally-occurring sources of isotopically mixed elemental material(s). The single crystal is preferably devoid of structural defects such as grain boundaries, inclusions, impurities and lattice vacancies. Device configurations may be formed from the layer according to a predetermined pattern using lithographic and/or milling techniques. An optional protective layer may be deposited on some or all of the device to avoid formation of oxides and/or patinas on surfaces of the device.