C04B37/021

Power semiconductor substrates with metal contact layer and method of manufacture thereof

A power semiconductor substrate comprising an insulating planar base, at least one conductor track and at least one contact area as part of the conductor track, wherein a layer of a metallic material is disposed on the contact area by means of pressure sintering. The associated method comprises the steps of: producing a power semiconductor substrate that includes a planar insulating base, conductor tracks and contact areas; arranging a pasty layer, composed of a metallic material and a solvent, on at least one contact area of the power semiconductor substrate; and applying pressure to the pasty layer.

CARRIER SUBSTRATE FOR ELECTRICAL, MORE PARTICULARLY ELECTRONIC, COMPONENTS, AND METHOD FOR PRODUCING A CARRIER SUBSTRATE
20210410282 · 2021-12-30 ·

A carrier substrate (1) that includes an insulation layer (11) and a metal layer (12), wherein a flank profile (2), in particular an etching flank profile, at least zonally borders the metal layer (12) in a primary direction (P) extending parallel to the main extension plane (HSE), wherein, viewed in the primary direction (P), the flank profile (2) extends from a first edge (15) on an upper side (31) of the metal layer (12), which faces away from the insulation layer (11), to a second edge (16) on a lower side (32) of the metal layer (12), which faces the insulation layer (11), characterized in that the flank profile (2), viewed in the primary direction (P), has at least one local maximum (21) and at least one local minimum (22).

Semiconductor substrate

A semiconductor substrate includes a dielectric insulation layer and a first metallization layer attached to the dielectric insulation layer. The dielectric insulation layer includes a first material having a thermal conductivity of between 25 and 180 W/mK, and an insulation strength of between 15 and 50 kV/mm, and an electrically conducting or semiconducting second material evenly distributed within the first material.

METHOD FOR MANUFACTURING CERAMIC HEATER
20210387922 · 2021-12-16 ·

The present disclosure relates to a method for manufacturing a ceramic heater. The method for manufacturing a ceramic heater according to the present disclosure comprises: separately charging a ceramic powder into a center portion and multiple split edge portions in a formation mold and leveling the charged ceramic powder; manufacturing a molded body or pre-sintered body of the ceramic powder from the leveled ceramic powder; disposing a high-frequency electrode or a heating element on the molded body or pre-sintered body of the ceramic powder and filling a second ceramic powder; and integrally sintering the molded body or pre-sintered body of the ceramic powder and the second ceramic powder.

MONOLITHIC CERAMIC SURGICAL DEVICE AND METHOD
20210369333 · 2021-12-02 ·

A medical device and associated methods are disclosed. In one example, the medical device includes an electrosurgical forceps. In selected examples, one or more structural components of the electrosurgical forceps includes a sintered ceramic microstructure. In selected examples other medical devices, including a debrider and a lithotripter, include a sintered ceramic microstructure.

CERAMIC SUBSTRATE AND MANUFACTURING METHOD THEREFOR
20220208697 · 2022-06-30 ·

Provided are a ceramic substrate and a method of manufacturing the same, which suppress a warpage phenomenon caused by a difference in volumes occupied by upper and lower metal layers of a ceramic base material and controls areas of the upper and lower metal layers especially when thicknesses of the upper and lower metal layers on the ceramic base material are equal to each other, thereby reducing a defect rate of the ceramic substrate.

SILICON NITRIDE SUBSTRATE, SILICON NITRIDE-METAL COMPOSITE, SILICON NITRIDE CIRCUIT BOARD, AND SEMICONDUCTOR PACKAGE

A silicon nitride substrate includes silicon nitride and magnesium, in which when a surface of the silicon nitride substrate is analyzed with an X-ray fluorescence spectrometer under the specific Condition I, XB/XA is 0.8 or more and 1.0 or less.

Method of manufacturing insulating circuit board with heatsink

What is provided is a method of manufacturing an insulating circuit board with a heatsink including an insulating circuit board and a heatsink, the heatsink being bonded to the metal layer side of the insulating circuit board, the metal layer being formed of aluminum, and a bonding surface of the heatsink with the insulating circuit board being formed of an aluminum alloy having a solidus temperature of 650° C. or lower. This method includes a high alloy element concentration portion forming step (S02) of forming a high alloy element concentration portion and a heatsink bonding step (S03) of bonding the heatsink, in which a ratio tb/ta of a thickness tb of the brazing material layer to a thickness to of the core material in the clad material is in a range of 0.1 to 0.3.

Method for producing insulating circuit substrate with heat sink

A method is provided for producing an insulating circuit substrate with a heat sink including an insulating circuit substrate and a heat sink, the insulating circuit substrate including a circuit layer and a metal layer that are formed on an insulating layer, and the heat sink being bonded to the metal layer side. The method includes: an aluminum bonding layer forming step of forming an aluminum bonding layer formed of aluminum or an aluminum alloy having a solidus temperature of 650° C. or lower on the metal layer; and a heat sink bonding step of laminating a copper bonding material formed of copper or a copper alloy between the aluminum bonding layer and the heat sink and bonding the aluminum bonding layer, the copper bonding material, and the heat sink to each other by solid phase diffusion bonding.

Carrier substrate for electrical, more particularly electronic, components, and method for producing a carrier substrate

A carrier substrate (1) that includes an insulation layer (11) and a metal layer (12), wherein a flank profile (2), in particular an etching flank profile, at least zonally borders the metal layer (12) in a primary direction (P) extending parallel to the main extension plane (HSE), wherein, viewed in the primary direction (P), the flank profile (2) extends from a first edge (15) on an upper side (31) of the metal layer (12), which faces away from the insulation layer (11), to a second edge (16) on a lower side (32) of the metal layer (12), which faces the insulation layer (11), characterized in that the flank profile (2), viewed in the primary direction (P), has at least one local maximum (21) and at least one local minimum (22).