The present disclosure provides a fan-out chip packaging structure based on a shielded metal carrier plate and a method, the method comprising: providing a shielded metal carrier plate; forming one or more recesses on a first surface of the shielded metal carrier plate, wherein the recesses extend toward a second surface of the shielded metal carrier plate; applying conductive adhesive to areas on bottom walls of recesses reserved for chips to be fixed, placing the chips, and then baking to strengthen adhesion thereby attaching the chips within the recesses; covering areas of the recesses not occupied by the chips with a filler layer to fill and level the recesses; forming a rewiring layer on the first surface of the shielded metal carrier plate and covering the recesses, wherein the rewiring layer is electrically connected to the chips to enable electrical lead-out of the chips; and forming metal bumps on the rewiring layer.