Described herein are methods and apparatuses for packaging an ultrasound-on-a-chip. An ultrasound-on-a-chip may be coupled to a redistribution layer and to an interposer layer. Encapsulation may encapsulate the ultrasound-on-a-chip device and first metal pillars may extend through the encapsulation and electrically couple to the redistribution layer. Second metal pillars may extend through the interposer layer. The interposer layer may include aluminum nitride. The first metal pillars may be electrically coupled to the second metal pillars. A printed circuit board may be coupled to the interposer layer.

Integrated microelectromechanical systems (MEMS) acoustic sensor devices are disclosed. Integrated MEMS acoustic sensor devices can comprise a MEMS acoustic sensor element and a pressure sensor within the back cavity associated with the MEMS acoustic sensor element. Integrated MEMS acoustic sensor devices can comprise a port adapted to receive acoustic waves or pressure. Methods of fabrication are also disclosed.

One or more heating elements are provided to heat a MEMS component (such as a resonator) to a temperature higher than an ambient temperature range in which the MEMS component is intended to operate—in effect, heating the MEMS component and optionally related circuitry to a steady-state “oven” temperature above that which would occur naturally during component operation and thereby avoiding temperature-dependent performance variance/instability (frequency, voltage, propagation delay, etc.). In a number of embodiments, an IC package is implemented with distinct temperature-isolated and temperature-interfaced regions, the former bearing or housing the MEMS component and subject to heating (i.e., to oven temperature) by the one or more heating elements while the latter is provided with (e.g., disposed adjacent) one or more heat dissipation paths to discharge heat generated by transistor circuitry (i.e., expel heat from the integrated circuit package).

A micromechanical device that includes a silicon substrate with an overlying oxide layer and with a micromechanical functional layer lying above same, which extend in parallel to a main extension plane, a cavity being formed at least in the micromechanical functional layer and in the oxide layer. An access channel is formed in the oxide layer and/or in the micromechanical functional layer which, starting from the cavity, extends in parallel to the main extension plane and in the process extends in a projection direction, as viewed perpendicularly to the main extension plane, all the way into an access area outside the cavity. A method for manufacturing a micromechanical device is also described.

A MEMS device having a wafer-level package, is provided with: a stack of a first die and a second die, defining at least a first internal surface internal to the package and carrying at least an electrical contact pad, and at least a first external surface external to the package and defining a first outer face of the package; and a mold compound, at least in part coating the stack of the first and second dies and having a front surface defining at least part of a second outer face of the package, opposite to the first outer face. The MEMS device is further provided with: at least a vertical connection structure extending from the contact pad at the first internal surface towards the front surface of the mold compound; and at least an external connection element, electrically coupled to the vertical connection structure and exposed to the outside of the package, at the second outer face thereof.

The MEMS microphone includes a first circuit board; a second circuit board keeping a distance from the first circuit board; a frame located between the first circuit board and the second circuit board for forming a cavity cooperatively with the first circuit board and the second circuit board, the frame including a plated-through-hole; an ASIC chip located in the cavity; and an MEMS chip having a back cavity. The first circuit board is electrically connected with the second circuit board by the plated-through-hole. The frame includes a conductive layer and an insulating layer, and the conductive layer is located between an inner surface of the frame and the insulating layer.

A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die. Alternatively, the second semiconductor die is mounted to an interposer disposed over the interconnect structure.

A semiconductor pressure sensor assembly for measuring a pressure of an exhaust gas which contains corrosive components, comprising: a first cavity, a pressure sensor comprising first bondpads for electrical interconnection, a CMOS chip comprising second bondpads for electrical interconnection with the pressure sensor, an interconnection module having electrically conductive paths connected via bonding wires to the pressure sensor and to the CMOS chip; the interconnection module being a substrate with corrosion-resistant metal tracks, wherein the CMOS chip and part of the interconnection module are encapsulated by a plastic package.

The invention relates to a simple to produce electric component for chips with sensitive component structures. Said component comprises a connection structure and a switching structure on the underside of the chip and a support substrate with at least one polymer layer.

A semiconductor package structure includes an electronic device having an exposed region adjacent to a first surface, a dam surrounding the exposed region of the semiconductor die and disposed on the first surface, the dam having a top surface away from the first surface, an encapsulant encapsulating the first surface of the electronic device, exposing the exposed region of the electronic device. A surface of the dam is retracted from a top surface of the encapsulant. A method for manufacturing the semiconductor package structure is also provided.