According to one embodiment, a display device includes a first substrate, a second substrate, a liquid crystal layer and a seal. The second substrate is opposed to the first substrate. The liquid crystal layer is disposed between the first substrate and the second substrate. The seal bonds the first substrate to the second substrate together and seals the liquid crystal layer. The first substrate includes a light source disposed at a position overlapping the seal in a planar view. The light source is sealed by the seal.

Embodiments of the present disclosure disclose a display panel and a display device. In the display panel, an array base plate is located on a light exit side of the display panel and includes a binding part. The binding part includes a plurality of binding terminals. A circuit board assembly is bound to the plurality of binding terminals and includes a plurality of electronic components. The circuit board assembly is bent to a side of a color film base plate that is away from the array base plate. Each of the electronic components is located on a side of the circuit board assembly that is away from the color film base plate.

A display device includes a display panel including data lines configured to receive an image signal, gate lines configured to receive a scan signal, and gate connection lines configured to transmit the scan signal to the gate lines; and a multi-chip film package including, on a film, a first gate integrated circuit (IC) configured to transmit a first scan signal to the gate connection lines through first gate output lines, a second gate IC configured to transmit a second scan signal to the gate connection lines through second gate output lines, and a source IC configured to transmit the image signal to the data lines through source output lines. Each of the first gate output lines is between two adjacent source output lines, and each of the second gate output lines is between two adjacent source output lines.

An electronic device has a display screen and a driver chip disposed on a driver area of the display screen. A fan-out area of the display screen has interconnects configured to provide electrical accesses to display elements of the display area. The driver chip includes a first edge, a second edge, and a row of electronic pads proximate to the first edge. The electronic pads have a first subset of end pads at a first end of the first row, a second subset of end pads at a second opposite end of the first row, and a subset of intermediate pads located between the first subset and second subset of end pads. The first subset of end pads physically contact a first subset of interconnects from the first edge, and the subset of intermediate pads physically contact a second subset of interconnects from the one or more second edges.

An electronic device has a display substrate including a display area, a driver area, and a fan-out area. The fan-out area has interconnects providing electrical accesses to display elements of the display area. The device has a driver chip disposed on the driver area. The driver chip includes a first edge adjacent to the display area and multiple pad groups, each pad group including a respective row of electronic pads that is (i) arranged substantially in parallel with the first edge and (ii) electrically coupled to a respective subset of display elements via respective interconnects routed on a respective region of the fan-out area. The pad groups include a first pad group and a second pad group. The first and second pad groups have two different distances from the first edge and correspond to two different subsets of interconnects routed on two non-overlapping regions of the fan-out area.

A display device has a display area and a peripheral area and includes data lines, scan lines, gate transmission lines, and sub-pixels. The data lines and the gate transmission lines extend from the peripheral area into the display area. The data lines located in the display area extend along a first direction. The scan lines are located in the display area and extend along a second direction intersecting the first direction. The gate transmission lines are electrically connected to the scan lines. One of the gate transmission lines includes first, second, and third wires located in the display area. The first and third wires extend along the first direction. The second wire extends along the second direction. The first, second and third wires are electrically connected in sequence. The third wire is electrically connected to one of the scan lines.

A display device includes a first conductive layer including horizontal scan lines, and island-type electrodes, which are spaced apart from the horizontal scan lines; a first insulating layer disposed on the first conductive layer; a second conductive layer disposed on the first insulating layer, the second conductive layer including data lines, and a plurality of vertical scan lines; a second insulating layer disposed on the second conductive layer; and a third conductive layer disposed on the second insulating layer and including first shield electrodes, which cover first edges of the vertical scan lines, and second shield electrodes, which are spaced apart from the first shield electrodes, and cover second edges of the vertical scan lines, wherein the vertical scan lines are electrically connected to the island-type electrodes via contact holes that extend through the first insulating layer.

An electronic device has a display screen and a driver chip disposed on a driver area of the display screen. A fan-out area of the display screen has interconnects configured to provide electrical accesses to display elements of the display area. The driver chip includes a first edge, a second edge, and a row of electronic pads proximate to the first edge. The electronic pads have a first subset of end pads at a first end of the first row, a second subset of end pads at a second opposite end of the first row, and a subset of intermediate pads located between the first subset and second subset of end pads. The first subset of end pads physically contact a first subset of interconnects from the first edge, and the subset of intermediate pads physically contact a second subset of interconnects from the one or more second edges.

A display apparatus including data lines, first gate lines, pixel structures, second gate lines, and first common lines is provided. The data lines are arranged in a first direction. The first gate lines are arranged in a second direction. The data lines and the second gate lines are arranged in the first direction, and the second gate lines are electrically connected to the first gate lines. The pixel structures are arranged in pixel columns which are arranged in the first direction. Each of the first common lines and the corresponding second gate line are configured between two adjacent pixel columns. The first common line and the corresponding second gate line are configured respectively on the opposite sides of the first gate line which is electrically connected to the corresponding second gate line. The first common line and the corresponding second gate line are structurally separated.

A display device is provided and includes first display area in which first pixel is provided; second display area in which second pixel is provided, second display area provided next to first display area; light shield surrounding first and second display areas, light shield having first slit surrounding first display area and second slit surrounding second display area; first sealant surrounding first and second display areas; and second sealant located between first and second display areas, second sealant having at least one opening which communicates first and second display areas to each other; wherein first slit is provided along first and second sealants and second slit is provided along first and second sealants, and part of first and second slits are parallelly extended along opening between first and second display areas.