Patent classifications
G06F11/0751
Computing system and method for automated program error repair
This application relates to a computing system and method for an automated program error repair. In one aspect, the computing system includes a storage, a preprocessing processor, and an automated error repair processor. The storage stores a program code. The preprocessing processor acquires the program code from the storage and preprocesses the program code. Preprocessing includes tokenizing the program code with tokens, converting the tokens into vectors, and adding location information for the tokens. The automated error repair processor receives the preprocessed program code as an input from the preprocessing processor, detects an error in the preprocessed program code, corrects the detected error, and outputs the error-corrected program code. Detecting and correcting the error are performed based on a deep learning result and the location information for the tokens.
Subsystem for configuration, security, and management of an adaptive system
An integrated circuit (IC) can include a processor system configured to execute program code, a programmable logic, and a platform management controller coupled to the processor system and the programmable logic. The platform management controller is adapted to configure and control the processor system and the programmable logic independently.
Technologies for providing shared memory for accelerator sleds
Technologies for providing shared memory for accelerator sleds includes an accelerator sled to receive, with a memory controller, a memory access request from an accelerator device to access a region of memory. The request is to identify the region of memory with a logical address. Additionally, the accelerator sled is to determine from a map of logical addresses and associated physical address, the physical address associated with the region of memory. In addition, the accelerator sled is to route the memory access request to a memory device associated with the determined physical address.
Database and file management for data validation and authentication
Techniques for database and file management herein include a processor and a memory device storing instructions that cause the processor to perform operations comprising creating a request based on an extensible markup language (XML) or an interpreted scripting language object, wherein the request comprises unauthenticated data for validation. The operations can also include transmitting the request to a remote device), updating metadata corresponding to the request to indicate the successful validation by the remote device, validating a response file, and detecting a discrepancy between the unauthenticated data and the authenticated data accessible by the remote device. Additionally, the operations include obtaining correction data to resolve the discrepancy, and executing a transaction based on the request and the correction data.
DATA STORAGE DEVICE WITH DATA VERIFICATION CIRCUITRY
A data storage device includes a non-volatile memory device including a memory block having a number of memory dies, and a controller coupled to the memory device. A memory access command is received and a memory access operation based on the received command is performed. A number of bytes transferred during the memory access operation is determined, and the determined number of bytes is analyzed to determine whether the number of transferred bytes is equal to a predetermined number. A transfer status fail bit is set if the number of transferred bytes is not equal to the predetermined number.
ANOMALY DETECTION USING TENANT CONTEXTUALIZATION IN TIME SERIES DATA FOR SOFTWARE-AS-A-SERVICE APPLICATIONS
A system may include a historical time series data store that contains electronic records associated with Software-as-a-Service (“SaaS”) applications in a multi-tenant cloud computing environment (including time series data representing execution of the SaaS applications). A monitoring platform may retrieve time series data for the monitored SaaS application from the historical time series data store and create tenant vector representations associated with the retrieved time series data. The monitoring platform may then provide the retrieved time series data and tenant vector representations together as final input vectors to an autoencoder to produce an output including at least one of a tenant-specific loss reconstruction and tenant-specific thresholds for the monitored SaaS application. The monitoring platform may utilize the output of the autoencoder to automatically detect an anomaly associated with the monitored SaaS application.
Scalable runtime validation for on-device design rule checks
An apparatus to facilitate scalable runtime validation for on-device design rule checks is disclosed. The apparatus includes a memory to store a contention set, one or more multiplexors, and a validator communicably coupled to the memory. In one implementation, the validator is to: receive design rule information for the one or more multiplexers, the design rule information referencing the contention set; analyze, using the design rule information, a user bitstream against the contention set at a programming time of the apparatus, the user bitstream for programming the one or more multiplexors; and provide an error indication responsive to identifying a match between the user bitstream and the contention set.
LOG ANALYZER FOR FAULT DETECTION
Apparatuses and methods for anomaly detection. In one embodiment, a method is implemented in a computing device for building a tree structure to represent a system behavior includes obtaining one or more training log records; and building a tree structure using the one or more training log records. The tree structure includes a plurality of tree nodes. Each successive tree node in a root-to-leaf path of the tree structure representing successive log elements of the one or more training log records. Each of the one or more training log records includes one or more log elements. In one embodiment, a method implemented in a computing device for fault detection includes obtaining a live log record and determining an anomaly in the live log record by comparing corresponding successive elements of the live log record to successive nodes in a root-to-leaf direction of the tree structure.
SYSTEM AND METHOD FOR MONITORING CODE OVERWRITE ERROR OF REDRIVER CHIP
A system and method for monitoring a code overwrite error of a Redriver chip are disclosed. An analog to digital converter (ADC) monitors whether an EEPROM code of a Redriver chip has been overwritten in error. A Switch chip is utilized to separate the Redriver chip from a system management bus (SMbus) controller. A pull-up resistor keeps an SMbus at a Redriver chip/EEPROM side in a pull-up state. The ADC is utilized to monitor the SMbus. When an abnormal low level is monitored, an alarm signal is sent to the SMbus controller to give a risk alarm for an overwrite error. In addition, according to different ADC sampling rates, an SMbus may also be connected between the SMbus controller and an ADC with a high sampling rate, whereby SMbus data can be monitored.
OPC UA-Based Anomaly Detection and Recovery System and Method
An anomaly detection and recovery system (ADRS) for an open platform communications united architecture (OPC UA)-based industrial automation network that includes OPC UA devices includes an anomaly detector is configured to monitor an OPC UA traffic stream comprising OPC UA messages of the OPC UA devices and analyze the OPC UA traffic stream using OPC UA semantics of the industrial automation network for anomaly detection.