A method includes, in response to a memory error indication indicating an uncorrectable error in a faulted segment, associating in a remapping table the faulted segment with a patch segment in a patch memory region, and in response to receiving from a processor a memory access request directed to the faulted segment, servicing the memory access request from the patch segment by performing the requested memory access at the patch segment based on a patch segment address identifying the location of the patch segment. The patch segment address is determined from the remapping table and corresponds to a requested memory address specified by the memory access request.

A dynamic vision sensor (DVS) or change detection sensor reacts to changes in light intensity and in this way monitors how a scene changes. This disclosure covers both single pixel and array architectures. The DVS may contain one pixel or 2-dimensional or 1-dimensional array of pixels. The change of intensities registered by pixels are compared, and pixel addresses where the change is positive or negative are recorded and processed. Analyzing frames based on just three values for pixels, increase, decrease or unchanged, the proposed DVS can process visual information much faster than traditional computer vision systems, which correlate multi-bit color or gray level pixel values between successive frames.

A method, system and computer readable medium for running a legacy application on a non-legacy device. Operating parameters of the non-legacy device when running the legacy application are set based on one or more pre-determined heuristics for adjustment of operating parameters of the newer system when running the legacy application on the non-legacy device from one or more performance metrics and other performance information.

A method of detecting anomalous latencies in communications between components on an integrated circuit (IC) chip. The method includes: (i) monitoring communications between a first component of the IC chip and other components of the IC chip, each communication comprising a command sent from the first component to another component, and a response received by the first component from that other component, the monitoring comprising: measuring the number of communications in each of a series of monitored time windows, and measuring the latency of each communication in the series of monitored time windows; (ii) calculating a maximum tolerable latency for each operational time window of the first component from the number of communications in that operational time window, an available stall time of the first component in that operational time window, and a latency penalty factor for that operational time window; and (iii) determining a measured latency to be anomalous if the measured latency is greater than the maximum tolerable latency.

A storage device is disclosed. The storage device may include storage to store data and a controller to manage reading data from and writing data to the storage. The controller may also include a receiver to receive a plurality of requests, information determination logic to determine information about the plurality of requests, storage for the information about a plurality of requests, and sharing logic to share the information with a management controller.

A graph model of a graphical user interface (GUI) may be generated by processing usage data of the GUI where the usage data comprises sequences of GUI pages and actions between GUI pages. The nodes of the graph model may be determined by obtaining GUI pages from the usage data, identifying dynamic GUI elements in the GUI pages, generating canonical GUI pages by modifying the GUI pages using the dynamic GUI elements, and creating graph nodes using the canonical GUI pages. The edges of the graph may be determined by processing actions from the GUI data that were performed by users to transition from one GUI page to another GUI page. The graph model of the GUI may be used for any appropriate application, such as determining statistics relating to the GUI or statistics relating to individual users of the GUI.

An instrumentation analysis system processes data streams by executing instructions specified using a data stream language program. The data stream language allows users to specify a search condition using a find block for identifying the set of data streams processed by the data stream language program. The set of identified data streams may change dynamically. The data stream language allows users to group data streams into sets of data streams based on distinct values of one or more metadata attributes associated with the input data streams. The data stream language allows users to specify a threshold block for determining whether data values of input data streams are outside boundaries specified using low/high thresholds. The elements of the set of data streams input to the threshold block can dynamically change. The low/high threshold values can be specified as data streams and can dynamically change.

A processing unit can include a performance monitor for monitoring the performance of the processing unit and associated sub-units. The performance monitor can include a state machine. The state machine can be implemented via state machine data entries stored in a memory associated with the performance monitor. A state machine data entry includes information indicating a state transition condition and output signals. The state transition condition includes a current state and input signals required to meet the condition. The output signals include a next state, one or more counter actions, and one or more triggers. The performance monitor implements logic circuits that determine, based on input signals and the state machine data entries, the next state to transition and associated output signals. The state machine data entries can be written and re-written by a user.

A memory controller interfaces with a dynamic random access memory (DRAM). The memory controller selectively places memory commands in a memory interface queue, and transmits the commands from the memory interface queue to a memory channel connected to at least one dynamic random access memory (DRAM). The transmitted commands are stored in a replay queue. A number of activate commands to a memory region of the DRAM is counted. Based on this count, a refresh control circuit signals that an urgent refresh command should be sent to the memory region. In response to detecting a designated type of error, a recovery sequence initiates to re-transmit memory commands from the replay queue. Designated error conditions can cause the recovery sequence to restart. If an urgent refresh command is pending when such a restart occurs, the recovery sequence is interrupted to allow the urgent refresh command to be sent.

Systems, methods and/or computer program products optimizing network policies between microservices of a service mesh. The service mesh tracks incoming API calls of applications and based on the historical transactions, the context of API calls, and the microservices in the microservice chain being invoked, network controls and policy configurations are set to optimize the transactions performed by the service mesh. Dimensions of the communications between microservices of the service mesh are dynamically optimized via the service mesh control plane using a policy optimizer. Optimized dimensions of service mesh transactions includes automated policy adjustments to retries between microservices, circuit breaking between microservices, automated timeout adjustments between microservices and intelligent rate limiting between microservices and/or rate limiting applied to user profiles.