Disclosed is an operation method of a memory device which performs a self-refresh operation. The method includes receiving a deep-sleep mode enter command from a memory controller, changing a magnitude of an internal voltage of the memory device from a first voltage to a second voltage smaller than the first voltage, in response to the deep-sleep mode enter command, and entering a self-refresh mode under control of the memory controller, and the internal voltage is maintained at the second voltage during the self-refresh mode.

Methods, systems, and devices for power management techniques are described. A memory system may receive a command to exit a first power mode and enter a second power mode. The first power mode may have a lower power consumption than the second power mode. The memory system may determine whether a duration of an idle period associated with the first power mode satisfies a threshold based on receiving the command to exit the first power mode. The memory system may receive another command associated with executing a flush operation and perform one or more power management operations based on receiving the command and determining that the duration satisfies the threshold.

A memory system includes a memory array having a plurality of memory cells; and a controller coupled to the memory array, the controller configured to: designate a storage mode for a target set of memory cells based on valid data in a source block, wherein the target set of memory cells are configured with a capacity to store up to a maximum number of bits per cell, and the storage mode is for dynamically configuring the target set of memory cells in as cache memory that stores a number of bits less per cell than the corresponding maximum capacity.

According to the embodiments, an external storage device switches to an interface controller for supporting only a read operation of nonvolatile memory when a shift condition for shifting to a read only mode is met. A host device switches to an interface driver for supporting only the read operation of the nonvolatile memory when determining to recognize as read only memory based on information acquired from the external storage device.

According to some examples, systems and methods are provided for determining a set of power states supported by a data storage device and applying an operation to the data storage device based on whether the set of power states includes a low power state.

An apparatus is described. The apparatus can include non-volatile memory, an embedded processor, and a memory controller. The memory controller can access data from the byte addressable non-volatile memory using at least one of: a first addressing scheme or a second addressing scheme. The memory controller can provide the data to a host system over a first interface when the data is accessed using the first addressing scheme. The memory controller can provide the data to the embedded processor over a second interface when the data is accessed using the second addressing scheme.

An information processing device including: a processor configured to collect information on a connected expansion device; and a controller configured to receive the information on the expansion device from the processor, to determine, with respect to a type of an expansion device, whether the expansion device is a specific device that is connected to a storage, and to perform, when the expansion device has been determined to be the specific device, monitoring processing of monitoring an operation of the storage based on information on the storage that is obtained from the specific device.

A graceful shutdown of a computer system is initiated by sending a command to an asynchronous dynamic random access memory refresh (ADR) trigger device to assert an ADR trigger. Responsive to the command, the ADR trigger device asserts the ADR trigger to initiate an ADR of a non-volatile dual in-line memory module (NVDIMM) of the computer system. In response to the ADR trigger being asserted by the ADR trigger device, an ADR of the NVDIMM is performed before completing the graceful shutdown of the computer.

A determination that a first programming operation has been performed on a particular memory cell can be made. A determination can be made, based on one or more threshold criteria, whether the particular memory cell has transitioned from a state associated with a decreased error rate to another state associated with an increased error rate. In response to determining that the particular memory cell has transitioned from the state associated with the decreased error rate to the another state associated with the increased error rate, an operation can be performed on the particular memory cell to transition the particular memory cell from the another state associated with the increased error rate to the state associated with the decreased error rate.

A storage system includes a first storage apparatus including a first storage portion and a second storage portion, a second storage apparatus including a third storage portion and a fourth storage portion, and a storage management apparatus including a processor configured to control the first storage apparatus in an active state and control the second storage apparatus in a standby state, cause the first storage apparatus to execute first data relocation processing, cause the second storage apparatus to execute second data relocation processing, cause the first storage apparatus to suspend the first data relocation processing and cause the second storage apparatus to continue the second data relocation processing, switch the first storage apparatus from the active state to the standby state and switch the second storage apparatus from the standby state to the active state, and cause the first storage apparatus to resume the first data relocation processing.