Patent classifications
G06F3/0653
MEMORY SUB-SYSTEM SIGNATURE GENERATION
A method includes receiving signaling indicative of performance of a shutdown operation involving a memory device to a controller resident on the memory device; initiating a power off sequence in response to the received signaling, wherein the power off sequence includes execution of instructions corresponding to a plurality of routines; and writing data comprising respective shutdown signatures associated with execution of the plurality of routines to a media associated with the memory device upon completion of each of one or more of the plurality of routines, wherein the media is bit-addressable or byte-addressable.
MEMORY DEVICE, MEMORY DEVICE CONTROLLING METHOD, AND MEMORY DEVICE MANUFACTURING METHOD
According to one embodiment, a memory device includes a first nonvolatile memory die, a second nonvolatile memory die, a controller, and a first temperature sensor and a second temperature sensor incorporated respectively in the first nonvolatile memory die and the second nonvolatile memory die. The controller reads temperatures measured by the first and second temperature sensors, from the first and second nonvolatile memory dies. When at least one of the temperatures read from the first and second nonvolatile memory dies is equal to or higher than a threshold temperature, the controller reduces a frequency of issue of commands to the first and second nonvolatile memory dies or a seed of access to the first and second nonvolatile memory dies.
Systems and Methods for Scaling Volumes Using Volumes Having Different Modes of Operation
A method, a computing device, and a non-transitory machine-readable medium for managing modes of operation for volumes in a node. A first portion of a plurality of volumes in a node is selected to operate in an active mode. A second portion of the plurality of volumes in the node is selected to operate in a passive mode. The second portion of the volumes that operates in the passive mode consumes fewer resources than the first portion of the volumes that operates in the active mode. The first portion of the plurality of volumes and the second portion of the plurality of volumes are adjusted over time based on activity of each volume of the plurality of volumes.
Resolving detected access anomalies in a vast storage network
A method for execution by a computing device of a dispersed storage network includes obtaining resource information for a subset of storage units of a storage unit pool. W available storage units of the storage unit pool are identified in response to receiving a store data request. W choose S combinations of selecting S number of storage units of the W available storage units are identified. A plurality of rating levels is calculated based on the resource information, where each of the plurality of rating levels are assigned to a corresponding combination of the W choose S combinations. One combination of the W choose S combinations is selected based on the plurality of rating levels. Storage of data of the store data request is facilitated utilizing the S number of storage units of the selected one combination.
Distributing data across a mixed data storage center
A computer-implemented method according to one embodiment includes identifying a plurality of storage systems within a storage environment, determining characteristics of each of the plurality of storage systems, the characteristics including one or more data reduction techniques implemented by each of the plurality of storage systems, performing a plurality of storage simulations of one or more data volumes, utilizing the characteristics of each of the plurality of storage systems, and determining one of the plurality of storage systems to store the one or more data volumes, based on results of the plurality of storage simulations.
STORAGE DEVICE AND A METHOD OF OPERATING THE STORAGE DEVICE, AND A VEHICLE INCLUDING THE STORAGE DEVICE
A storage device includes a cell degradation measurement circuit configured to receive a cell degradation information request command that requests cell degradation information from a host, and provide first cell degradation information to the host in response to the cell degradation information request command, and a non-volatile memory including a plurality of memory cells. The cell degradation measurement circuit writes data to any one of the plurality of memory cells in response to the cell degradation information request command. The cell degradation measurement circuit reads the written data after a predetermined time has elapsed. The first cell degradation information is generated based on an error detection operation performed on the read data.
CONTROL OF BACK PRESSURE BASED ON A TOTAL NUMBER OF BUFFERED READ AND WRITE ENTRIES
A memory controller may calculate a sum of a first number of entries stored in a read buffer and a second number of entries stored in a write buffer. If the sum is less than a first threshold and the read/write buffer is not full of entries, then the memory controller can request read/write commands from a host computing device. If the sum is not less than the first threshold or the read/write buffer is full of entries, then the memory controller can assert backpressure to stop the incoming flow newly incoming read/write commands from the host computing device. Additionally, or alternatively, the memory controller may dequeue a write command entry only if a number of write command entries stored in a write command FIFO memory is greater than a second threshold. The memory controller may dequeue read command stored in a read FIFO memory if the number of write command entries stored in the write command FIFO memory is less than or equal to the second threshold and the read FIFO memory is not empty of the read command entries.
MANAGING PERFORMANCE THROTTLING IN A DIGITAL CONTROLLER
Provided is a system and method for storing, via a processor, in a memory of an application specific integrated circuit (ASIC), one or more threshold values responsive to at least one of physical layer and processing layer operating conditions of the ASIC. Also included is monitoring at least one of a physical layer operating condition value and a processing layer performance condition value of the ASIC, the moderating forming a monitored value, comparing the monitored value with the stored threshold values, and throttling processing layer performance of the ASIC when the monitored value exceeds at least one of the stored threshold values.
MICROSERVICES SERVER AND STORAGE RESOURCE CONTROLLER
Aspects of the present disclosure relate to controlling resource consumption of a server and storage array. In embodiments, a request can be received by a server that is communicatively coupled to a storage array. Further, the services required to process the request can be identified. Additionally, services' activation can be controlled based on a mapping of request-related actions and initiated services.
CACHE-ASSISTED ROW HAMMER MITIGATION
A system comprising a row hammer mitigation circuitry and a cache memory that collaborate to mitigate row hammer attacks on a memory media device is described. The cache memory biases cache policy based on row access count information maintained by the row hammer mitigation circuit. The row hammer mitigation circuitry may be implemented in a memory controller. The memory media device may be DRAM. Corresponding methods are also described.