Patent classifications
G06N10/40
Electronic generation of three-dimensional quantum circuit diagrams
Systems and techniques that facilitate electronic generation of three-dimensional quantum circuit diagrams are provided. In various embodiments, a system can comprise a data component that can access qubit topology data characterizing a quantum computing device. In various aspects, the system can further comprise a rendering component that can render a three-dimensional quantum circuit diagram based on the qubit topology data. In various instances, the qubit topology data can indicate which qubits of the quantum computing device are coupled together. In various cases, the rendering component can render the three-dimensional quantum circuit diagram by generating a two-dimensional qubit configuration model of the quantum computing device based on which qubits of the quantum computing device are coupled together, by extruding one or more qubit lines three-dimensionally outward from the two-dimensional qubit configuration model, and by rendering one or more quantum gates on the one or more qubit lines.
Stabilizer measurement decoding using additional edges to identify errors caused by cross-talk
Extra edges are added to a group of edges for use in decoding syndrome measurements of a surface code implemented using hybrid acoustic-electric qubits. The extra edges include two-dimensional cross-edges and three-dimensional space-time correlated edges that identify correlated errors arising from spurious photon dissipation processes of a multiplexed control circuit that leads to cross-talk between storage modes of a set of the mechanical resonators controlled by the given multiplexed control circuit. Additionally, error probabilities used for edge weighting incorporate error probabilities due to the spurious photon dissipation processes.
Stabilizer measurement decoding using additional edges to identify errors caused by cross-talk
Extra edges are added to a group of edges for use in decoding syndrome measurements of a surface code implemented using hybrid acoustic-electric qubits. The extra edges include two-dimensional cross-edges and three-dimensional space-time correlated edges that identify correlated errors arising from spurious photon dissipation processes of a multiplexed control circuit that leads to cross-talk between storage modes of a set of the mechanical resonators controlled by the given multiplexed control circuit. Additionally, error probabilities used for edge weighting incorporate error probabilities due to the spurious photon dissipation processes.
Topological quantum computing components, systems, and methods
A qubit device includes a crystal immobilized on a substrate and in contact with electrodes. The crystal exhibits a charge pair symmetry and with an electron current moving clockwise, counter clockwise, or both. The current in can be placed in a state of superposition wherein the current is unknown until it is measured, and the direction of the current is measured to produce a binary output corresponding to a logical zero or a logical one. A state of the qubit device is monitored by measuring a voltage, a current, or a magnetic field and assigning a superposition or base state depending on a threshold value.
Topological quantum computing components, systems, and methods
A qubit device includes a crystal immobilized on a substrate and in contact with electrodes. The crystal exhibits a charge pair symmetry and with an electron current moving clockwise, counter clockwise, or both. The current in can be placed in a state of superposition wherein the current is unknown until it is measured, and the direction of the current is measured to produce a binary output corresponding to a logical zero or a logical one. A state of the qubit device is monitored by measuring a voltage, a current, or a magnetic field and assigning a superposition or base state depending on a threshold value.
QUANTUM COMPUTER ARCHITECTURE BASED ON SILICON DONOR QUBITS COUPLED BY PHOTONS
An architecture for fault-tolerant universal quantum computation is suited for matter qubits, such as donor qubits in silicon, coupled by a network of photonic interconnects. The basic operational building blocks are local measurements and unitaries, plus an entangling measurement of non-local Pauli operators. 3D graph states created by applying deterministic entangling measurements to pairs of qubits in knitting and fusion processes to yield resource states for one way computing. The deterministic entangling measurements are facilitated by configuring the network with active switches to allow single photons to interact with pairs of matter qubits.
QUANTUM COMPUTER ARCHITECTURE BASED ON SILICON DONOR QUBITS COUPLED BY PHOTONS
An architecture for fault-tolerant universal quantum computation is suited for matter qubits, such as donor qubits in silicon, coupled by a network of photonic interconnects. The basic operational building blocks are local measurements and unitaries, plus an entangling measurement of non-local Pauli operators. 3D graph states created by applying deterministic entangling measurements to pairs of qubits in knitting and fusion processes to yield resource states for one way computing. The deterministic entangling measurements are facilitated by configuring the network with active switches to allow single photons to interact with pairs of matter qubits.
CRYO-COMPATIBLE QUANTUM COMPUTING ARRANGEMENT AND METHOD FOR PRODUCING A CRYO-COMPATIBLE QUANTUM COMPUTING ARRANGEMENT
A cryo-compatible quantum computing arrangement includes a microelectronic quantum computing component having a substrate structure, a plurality of first contact elements and a plurality of conductive feedthroughs through the substrate structure, wherein the conductive feedthroughs are electrically connected on a first main surface area of the substrate structure to associated first contact elements of the microelectronic quantum computing component, and a further microelectronic component having a plurality of second contact elements, wherein on a second main surface area of the substrate structure, the conductive feedthroughs are electrically connected to associated second contact elements of the further microelectronic component, and wherein the conductive feedthroughs each include, between the first and second contact elements, a layer element including a first material that is superconducting at a quantum computing operating temperature, and a filling element including a second material that is electrically conductive.
CRYO-COMPATIBLE QUANTUM COMPUTING ARRANGEMENT AND METHOD FOR PRODUCING A CRYO-COMPATIBLE QUANTUM COMPUTING ARRANGEMENT
A cryo-compatible quantum computing arrangement includes a microelectronic quantum computing component having a substrate structure, a plurality of first contact elements and a plurality of conductive feedthroughs through the substrate structure, wherein the conductive feedthroughs are electrically connected on a first main surface area of the substrate structure to associated first contact elements of the microelectronic quantum computing component, and a further microelectronic component having a plurality of second contact elements, wherein on a second main surface area of the substrate structure, the conductive feedthroughs are electrically connected to associated second contact elements of the further microelectronic component, and wherein the conductive feedthroughs each include, between the first and second contact elements, a layer element including a first material that is superconducting at a quantum computing operating temperature, and a filling element including a second material that is electrically conductive.
COUPLER AND CALCULATING DEVICE
According to one embodiment, a coupler includes first to fourth capacitors, first and second inductors, and a first Josephson junction. The first capacitor includes a first capacitor end portion and a first capacitor other-end portion. The first inductor includes a first inductor end portion, and a first inductor other-end portion. The second inductor includes a second inductor end portion, and a second inductor other-end portion. The first Josephson junction includes a first Josephson junction end portion, and a first Josephson junction other-end portion. A space is surrounded with the first inductor, the second inductor, and the first Josephson junction. The third capacitor includes a third capacitor end portion, and a third capacitor other-end portion. The fourth capacitor includes a fourth capacitor end portion, and a fourth capacitor other-end portion.