A display device includes: a substrate including first and second display regions and first and second non-display regions; a plurality of first pixels in the first display region; a plurality of second pixels in the second display region; a plurality of first scan stage circuits in the first non-display region, the first scan stage circuits configured to provide a scan signal to the first pixels; a plurality of second scan stage circuits in the second non-display region, the second scan stage circuits configured to provide a scan signal to the second pixels; a plurality of dummy scan stage circuits in the second non-display region, the dummy scan stage circuits being between the second scan stage circuits; and a scan bridge line in the second non-display region, the scan bridge line connecting one second scan stage circuit among the second scan stage circuits and a dummy scan stage circuit adjacent thereto.

A display panel includes a displaying area including pixels, a non-displaying area including a dummy pixel, and a switching circuit to transfer a data signal to the dummy pixel in response to a control signal. The display panel may compensate for defective pixels located in different data lines using only one dummy pixel column and may minimize an area (e.g., a dead space) including the dummy pixel column by including a distributor buffering a signal of an output line and a switching circuit selecting/providing a portion of a signal of the output line to a dummy data line.

A display device includes a substrate including a display area in which a plurality of sub-pixels are disposed, a plurality of anode electrodes respectively connected to the plurality of sub-pixels, and a cathode electrode connected to the plurality of sub-pixels and spaced apart from each of the plurality of anode electrodes. Each of the plurality of anode electrodes is disposed closer to the substrate than the cathode electrode by a height difference compensation part.

Display panel redundancy schemes and methods of operation are described. In an embodiment, and display panel includes an array of drivers (e.g. microdrivers), each of which including multiple portions to independently receive control and pixel bits. In an embodiment, each driver portion is to control a group of redundant emission elements.

A gate driver includes a plurality of active stages and a plurality of dummy stages. The active stage is configured to output a plurality of gate signals to a display region. The dummy stage is c connected to respective active stages and configured to output a plurality of dummy carry signals to the respective active stages. The active stage is configured to output the plurality of gate signals and a plurality of active carry signals. The plurality of dummy stages are configured to output the plurality of dummy carry signals, respectively, and not to output any gate signal.

A display device with touch detection function includes a display unit having a first and a second data lines, a first region outside the display unit, a second region on an opposite side of the first region sandwiching the display unit with the first region, a sensor unit including a sensor electrode, a first data signal supply line connected to the first data line and arranged in the first region, a second data signal supply line connected to the second data line and arranged in the second region, a dummy wiring arranged in the first region and not connected to the sensor electrode, and a sensor wiring arranged in the second region and connected to the sensor electrode. A line length of the dummy wiring in the first region is substantially same as a line length of the sensor wiring in the second region.

A display device includes: a data distribution circuit between a display area and a data driving circuit in a peripheral area, wherein the data distribution circuit includes: a plurality of first demultiplexers configured to receive a data signal output via a first output line from the data driving circuit and to transmit the data signal to a pair of first data lines from among the plurality of data lines; and a plurality of second demultiplexers configured to receive, through a corresponding conductive line from among the plurality of conductive lines, a data signal output via a second output line from the data driving circuit and to transmit the data signal to a pair of second data lines from among the plurality of data lines.

Provided is a display device comprising a display panel, an image shift controller, and a controller. The display panel is configured to display a display image, and includes a display area in which pixels are disposed and a sub-display area surrounding the display area and in which dummy pixels are disposed. The image shift controller is configured to generate a display image shift signal including information on a path through which the display image is shifted. The controller is configured to receive the display image shift signal to generate input image data to which the display image shift signal is applied. A size of a driving transistor included in each of the pixels disposed in the display area is different from a size of a driving transistor included in each of the dummy pixels disposed in the sub-display area.

According to one embodiment, a display device includes a driver, a pixel circuit disposed to be apart from the driver in a plan view and to be electrically connected to the driver, a first pixel electrode disposed to overlap the pixel circuit in a plan view and to be electrically connected to the pixel circuit, a second pixel electrode disposed to overlap the driver in a plan view and to be closer to an outer edge of a display area than the first pixel electrode, and a relay line disposed between the pixel circuit and the first pixel electrode and between the driver and the second pixel electrode, the relay line electrically connecting the first pixel electrode and the second pixel electrode.

A pixel of display device includes a light emitting element, a first transistor coupled between first power source and a second node and having a gate electrode connected to a first node N1, and the first transistor being configured to control a driving current supplied to the light emitting element in response to a voltage of the first node, a first capacitor including one electrode connected to the first node and another electrode connected to a third node, a second transistor coupled between the third node and a data line, a third transistor coupled between the first node and the second node, a fourth transistor coupled between the first node and an initialization power source, a fifth transistor coupled between a reference power source and the third node, and an eighth transistor coupled between a fourth node and an anode initialization power source.