Composite integrated circuit (IC) device structures that include two components coupled through hybrid bonded interconnect structure. The two components may be two different monolithic IC structures (e.g., chips) that are bonded over a substantially planar dielectric and metallization layer. A surface of a metallization feature may be augmented with supplemental metal, for example to at least partially backfill a recess in a surface of the metallization feature as left by a planarization process. In some exemplary embodiments, supplemental metal is deposited selectively onto a metallization feature through an autocatalytic (electroless) metal deposition process. A surface of a dielectric material surrounding a metallization feature may also be recessed, for example to at least partially neutralize a recess in an adjacent metallization feature, for example resulting from a planarization process.

In one embodiment, a semiconductor device includes a first wafer or a first chip including a first insulator and a first pad. The device further includes a second wafer or a second chip including a second insulator in contact with the first insulator, and a second pad opposed to the first pad and electrically connected to the first pad. Moreover, the first insulator includes a first trench extending to the first pad, and/or the second insulator includes a second trench extending to the second pad.

A method for bonding a first surface provided with at least one copper area surrounded by a silicon oxide area to a second surface includes an operation of treatment of the first surface by a plasma, before placing the first surface in contact with the second surface. The plasma is formed from a gas source containing a silicon oxide nitriding agent and a copper oxide reducing agent containing hydrogen. The gas source may include an N.sub.2 and NH.sub.3 and/or H.sub.2 gas mixture or a N.sub.2O and H.sub.2 gas mixture, or ammonia, which is then used both as a nitriding agent and as a reducing agent. The plasma obtained from this gas source then necessarily contains nitrogen and hydrogen, which enables, in a single operation, to provide a high-performance bonding between the first and second surfaces.

At least one polymer material may be employed to facilitate bonding between the semiconductor dies. Plasma treatment, formation of a blended polymer, or formation of polymer hairs may be employed to enhance bonding. Alternatively, air gaps can be formed by subsequently removing the polymer material to reduce capacitive coupling between adjacent bonding pads.

A method of forming a bonded assembly includes providing a first semiconductor die containing a first substrate, first semiconductor devices, and first bonding pads that are electrically connected to a respective node of the first semiconductor devices, forming a first oxidation barrier layer on physically exposed surfaces of the first bonding pads, providing a second semiconductor die containing a second substrate, second semiconductor devices, and second bonding pads that are electrically connected to a respective node of the second semiconductor devices, and bonding the second bonding pads to the first bonding pads with at least the first oxidation barrier layer located between the respective first and second bonding pads.

A surface treatment solution includes a fluoride source; a first solvent; and a water transforming agent to transform water produced during wafer surface treatment into a second solvent, which can be the same as, or different from, the first solvent. The solution can be used, for example, in surface preparation for wafers having a backend including an electrical interconnect that includes aluminum or an aluminum alloy.

A bonding system includes a substrate transfer device configured to transfer a first substrate and a second substrate to a bonding apparatus, a first holding plate configured to hold the first substrate from an upper surface side, and a second holding plate disposed below the first holding plate and configured to hold the second substrate from a lower surface side so that the second substrate faces the first substrate. The substrate transfer device includes a first holding part capable of holding the first substrate from the upper surface side, and a second holding part disposed below the first holding part and capable of holding the second substrate from the lower surface side. The first holding part and the second holding part are configured to receive and hold the first substrate and the second substrate at the same time from the first holding plate and the second holding plate.

A method for bonding chips to a landing wafer is disclosed. In one aspect, a volume of alignment liquid is dispensed on a wettable surface of the chip so as to become attached to the surface, after which the chip is moved towards the bonding site on the wafer, the bonding site equally being provided with a wettable surface. A liquid bridge is formed between the chip and the bonding site on the substrate wafer, enabling self-alignment of the chip. Dispensing alignment liquid on the chip and not the wafer is advantageous in terms of mitigating unwanted evaporation of the liquid prior to bonding.

In one embodiment, a semiconductor device includes a first wafer or a first chip including a first insulator and a first pad. The device further includes a second wafer or a second chip including a second insulator in contact with the first insulator, and a second pad opposed to the first pad and electrically connected to the first pad. Moreover, the first insulator includes a first trench extending to the first pad, and/or the second insulator includes a second trench extending to the second pad.

A semiconductor structure includes a first component and a second component bonded thereof. The first component includes a first dielectric layer, a first conductive structure, and a first filling material layer. The first conductive structure is in the first dielectric layer and includes a first conductive line and a first conductive pad thereon. The first filling material layer is on the first conductive line and surrounds the first conductive pad. The second component includes a second dielectric layer, a second conductive structure, and a second filling material layer. The second dielectric layer is bonded to the first dielectric layer. The second conductive structure is in the second dielectric layer, and includes a second conductive pad bonded to the first conductive pad. The second filling material layer surrounds the second conductive pad and in contact with a second conductive line on the second conductive pad.