A method of forming a redistribution structure includes providing a dielectric layer. The dielectric layer is patterned to form a plurality of via openings. A seed layer is formed on the dielectric layer and filling in the plurality of via openings. A patterned conductive layer is formed a on the seed layer, wherein a portion of the seed layer is exposed by the patterned conductive layer. The portion of the seed layer is removed by using an etching solution, thereby forming a plurality of conductive lines and a plurality of vias. During the removing the portion of the seed layer, an etch rate of the patterned conductive layer is less than an etch rate of the seed layer.

According to some embodiments of the present disclosure, a display device includes a substrate, a first electrode and a second electrode on the substrate, and spaced apart from each other, a light emitting element between the first electrode and the second electrode, a first bank pattern and a second bank pattern protruding in a display direction of the display device, a first contact electrode and a second contact electrode electrically connecting the light emitting element to the first electrode and the second electrode, respectively, the first contact electrode including a first contact light-transmitting layer, and a first reflective electrode including a first reflective layer, and a first light-transmitting layer including a same material as the first contact light-transmitting layer, at least a portion of the first reflective electrode being on the first bank pattern.

A method includes encapsulating a device in an encapsulating material, planarizing the encapsulating material and the device, and forming a conductive feature over the encapsulating material and the device. The formation of the conductive feature includes depositing a first conductive material to from a first seed layer, depositing a second conductive material different from the first conductive material over the first seed layer to form a second seed layer, plating a metal region over the second seed layer, performing a first etching on the second seed layer, performing a second etching on the first seed layer, and after the first seed layer is etched, performing a third etching on the second seed layer and the metal region.

In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.

In an embodiment, a device includes: a bottom integrated circuit die having a first front side and a first back side; a top integrated circuit die having a second front side and a second back side, the second back side being bonded to the first front side, the top integrated circuit die being free from through substrate vias (TSVs); a dielectric layer surrounding the top integrated circuit die, the dielectric layer being disposed on the first front side, the dielectric layer and the bottom integrated circuit die being laterally coterminous; and a through via extending through the dielectric layer, the through via being electrically coupled to the bottom integrated circuit die, surfaces of the through via, the dielectric layer, and the top integrated circuit die being planar.

A display device includes a first electrode and a second electrode disposed on a substrate and spaced apart from each other, a light emitting element on the substrate and having a first end and a second end, a third electrode disposed on the light emitting element, and electrically connecting the first electrode with the first end of the light emitting element, an insulating pattern disposed on the third electrode and exposing the second end of the light emitting element, and a fourth electrode on the substrate, and electrically connecting the second electrode with the second end of the light emitting element. A void may be formed between the light emitting element and the insulating pattern.

An electronic device comprises multiple integrated circuit (IC) dice disposed on a package substrate having a substrate area, a mold layer that includes the IC dice, and multiple conductive pillars extending from a surface of at least one IC die to a first surface of the mold layer, and an interposer layer extending over the substrate area and comprised of a stiffening material more rigid than a material of the package substrate. The interposer layer includes multiple electrically conductive through layer vias contacting the conductive pillars at a first surface of the mold layer and extending through the stiffening material to a second surface of the interposer layer.

A package structure includes a first semiconductor die, a second semiconductor die, a redistribution circuit structure, and a semiconductor device. The redistribution circuit structure has a first surface and a second surface opposite to the first surface, where the first surface is in contact with the first semiconductor die and the second semiconductor die, and the redistribution circuit structure is disposed on and electrically connected to the first semiconductor die and the second semiconductor die. The redistribution circuit structure includes a recess extending from the second surface toward the first surface. The semiconductor device is located in the recess and electrically connected to the first semiconductor die and the second semiconductor die through the redistribution circuit structure.

A package structure includes a first semiconductor die, a second semiconductor die, a redistribution circuit structure, and a semiconductor device. The redistribution circuit structure has a first surface and a second surface opposite to the first surface, where the first surface is in contact with the first semiconductor die and the second semiconductor die, and the redistribution circuit structure is disposed on and electrically connected to the first semiconductor die and the second semiconductor die. The redistribution circuit structure includes a recess extending from the second surface toward the first surface. The semiconductor device is located in the recess and electrically connected to the first semiconductor die and the second semiconductor die through the redistribution circuit structure.

An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.