Patent classifications
H01L2224/85815
METHOD FOR INSERTING A WIRE INTO A GROOVE OF A SEMICONDUCTOR CHIP
A method for inserting a wire into a longitudinal groove of a semiconductor chip for the assembly thereof, the groove containing a pad made of a bonding material having a set melting point, comprises: in a positioning step, placing a longitudinal section of the wire along the groove, in forced abutment against the pad; and, in an insertion step, exposing a zone containing at least one portion of the pad to a processing temperature higher than the melting point of the bonding material and for a sufficient time to make the pad at least partially melt, and causing the wire to be inserted into the groove. The present disclosure also relates to a piece of equipment allowing the insertion method to be implemented.
Method for joining a micorelectronic chip to a wire element
A method for joining a microelectronic chip to at least one wire element comprises a first step of applying a cover to a first face of the microelectronic chip, the cover being configured to form, with the first face, at least one temporary side groove. The method additionally comprises a step of inserting the wire element into the temporary groove. The method further comprises a step of attaching the wire element to the microelectronic chip. The method additionally comprises a step of removing the cover from the microelectronic chip.
SEMICONDUCTOR PACKAGING METHOD AND SEMICONDUCTOR PACKAGE DEVICE
The present disclosure provides a semiconductor packaging method and a semiconductor package device. The semiconductor packaging method includes providing a chip, where the chip includes a chip substrate having a front surface and a back surface, where the front surface includes a photosensitive region; soldering pads disposed at the front surface of the chip substrate surrounding the photosensitive region; a metal part formed on a side of each soldering pad facing away from the chip substrate; and a transparent protective layer formed on the front surface of the chip substrate, where a first end of the metal part is exposed by protruding over a surface of the transparent protective layer. The method further includes electrically connecting the first end of the metal part to a circuit board using a conductive connection part, such that the chip is electrically connected to the circuit board.
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A BOND WIRE OR CLIP BONDED TO A BONDING PAD
A method of manufacturing a semiconductor device includes: forming a base portion of a bonding pad on a semiconductor portion, the base portion further comprising a base layer; forming a main surface of the bonding pad, the main surface comprising a bonding region; bonding a bond wire or clip to the bonding region; and forming a supplemental structure directly on the base portion. The supplemental structure laterally adjoins the bond wire or clip or is laterally spaced apart from the bond wire or clip. A volume-related specific heat capacity of the supplemental structure is higher than a volume-related specific heat capacity of the base layer.
Selective Soldering with Photonic Soldering Technology
Electronic assembly methods and structures are described. In an embodiment, an electronic assembly method includes bringing together an electronic component and a routing substrate, and directing a large area photonic soldering light pulse toward the electronic component to bond the electronic component to the routing substrate.
Semiconductor device including bonding pad and bond wire or clip
A semiconductor device includes a bonding pad that includes a base portion having a base layer. A bond wire or clip is bonded to a bonding region of a main surface of the bonding pad. A supplemental structure is in direct contact with the base portion next to the bonding region. A specific heat capacity of the supplemental structure is higher than a specific heat capacity of the base layer.
Selective Soldering with Photonic Soldering Technology
Electronic assembly methods and structures are described. In an embodiment, an electronic assembly method includes bringing together an electronic component and a routing substrate, and directing a large area photonic soldering light pulse toward the electronic component to bond the electronic component to the routing substrate.
METHOD FOR JOINING A MICORELECTRONIC CHIP TO A WIRE ELEMENT
A method for joining a microelectronic chip to at least one wire element comprises: a first step of applying a cover to a first face of the microelectronic chip, the cover being configured to form, with the first face, at least one temporary side groove; a step of inserting the wire element into the temporary groove; a step of attaching the wire element to the microelectronic chip; and a step of removing the cover from the microelectronic chip.
CHIP PACKAGING STRUCTURE AND CHIP PACKAGING METHOD
The present invention provides a chip packaging structure and a chip packaging method. The chip packaging structure includes a substrate, a metal bonding pad disposed on the substrate and a metal wire, wherein the tail end of the metal wire is provided with a welding part, the welding part is welded to the metal bonding pad, the metal bonding pad is provided with a coating layer, and at least part of the welding part is located between the coating layer and the metal bonding pad. The present invention greatly improves a welding effect of the metal wire and the metal bonding pad, so that the welding of the metal wire and the metal bonding pad is more reliable and stable.
STRUCTURE FOR PACKAGING AND METHOD FOR MANUFACTURING THE SAME
The present invention relates to a structure for packaging and the method for manufacturing the same. The structure for packaging comprise two or more metal members disposed on a substrate or a semiconductor device. A patterned layer and an insulation layer are disposed surrounding the metal members. There is a gap between the patterned layer and the insulation layer. Thereby, while bonding the metal members, metal spilling can be avoided, for further preventing the structure from short circuit or current leakage.