Patent classifications
H01L2224/92157
SEMICONDUCTOR DEVICE ASSEMBLY AND METHOD THEREFOR
A method of forming a packaged semiconductor device includes attaching a backside surface of a semiconductor die to a major surface of a package substrate. A first conductive connector is formed over a portion of an active surface of the semiconductor die and a portion of the major surface of the package substrate. A first conductive connection between a first bond pad of the semiconductor die and a first substrate pad of the package substrate is formed by way of the first conductive connector. A bond wire connects a second bond pad of the semiconductor die to a second substrate pad of the package substrate. The first bond pad located between the second bond pad and an edge of the semiconductor die.
Low stress asymmetric dual side module
Implementations of semiconductor packages may include: a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include two or more spacers coupled to the first side of the first substrate and a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the two or more spacers.
Electronic module
An electronic module has a first substrate 11, a first conductor layer 12 that is provided on one side of the first substrate 11, a first electronic element 13 that is provided on one side of the first conductor layer 12, a second electronic element 23 that is provided on one side of the first electronic element 23, and a second connecting body 70 that has a second head part 71 provided on one side of the second electronic element 23 and an extending part 75 extending from the second head part 71 to the other side and abutting against the first substrate 11 or the first conductor layer 12.
SEMICONDUCTOR DEVICE, POWER CONVERSION DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes: a substrate; a semiconductor element arranged on the substrate; a plate-like member electrically connected to the semiconductor element; a first electrode formed on the semiconductor element and joined to the plate-like member with solder; a second electrode formed on the semiconductor element and spaced from the first electrode, and including a metal capable of forming an alloy with the solder; and a metal film formed on the semiconductor element and spaced from the second electrode in a region on the first electrode side as seen from the second electrode, in a two-dimensional view of the semiconductor element as seen from the plate-like member, and including a metal capable of forming an alloy with the solder.
WIRING STRUCTURE AND SEMICONDUCTOR MODULE
A lead frame structure for connecting a semiconductor chip to a connection target includes a conductive member electrically connecting the semiconductor chip and the connection target. The conductive member includes a first bonding part having a main surface, disposed on one side of the conductive member and being bonded to the semiconductor chip, a second bonding part having a main surface, being disposed on another side of the conductive member that is spaced from the one side in one direction and being bonded to the connection target, and a joining part having a wall section intersecting the main surface of the first bonding part and the main surface of the second bonding part, the wall section joining a portion of the first bonding part to a portion of the second bonding part.
SEMICONDUCTOR CLIP AND RELATED METHODS
Implementations of semiconductor clips may include a die attach portion coupled to a step portion, a lead attach portion directly coupled to the step portion, a first alignment feature directly coupled to a first side of the lead attach portion, and a second alignment feature directly coupled to a second side of the lead attach portion. The second side may be opposite the first side. The lead attach portion may be in a plane substantially parallel with a plane formed by the die attach portion.
LOW STRESS ASYMMETRIC DUAL SIDE MODULE
Implementations of semiconductor packages may include: a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include two or more spacers coupled to the first side of the first substrate and a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the two or more spacers.
SEMICONDUCTOR DEVICES AND METHODS OF MAKING THE SAME
In one embodiment, methods for making semiconductor devices are disclosed.
Semiconductor devices and methods of making the same
In one embodiment, methods for making semiconductor devices are disclosed.
ELECTRONIC MODULE
An electronic module has a first substrate 11, a first conductor layer 12 that is provided on one side of the first substrate 11, a first electronic element 13 that is provided on one side of the first conductor layer 12, a second electronic element 23 that is provided on one side of the first electronic element 23, and a second connecting body 70 that has a second head part 71 provided on one side of the second electronic element 23 and an extending part 75 extending from the second head part 71 to the other side and abutting against the first substrate 11 or the first conductor layer 12.