A chip on film package includes a base film, a patterned circuit layer, a chip and a reinforcing sheet. The base film includes a first surface, a second surface opposite to the first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The reinforcing sheet is disposed on the first surface and/or the second surface and exposes the chip, wherein a flexibility of the reinforcing sheet is substantially equal to or greater than a flexibility of the base film.

The invention relates to a multi-layer 3D foil package and to a method for manufacturing such a multi-layer 3D foil package. The 3D foil package has a foil substrate stack having at least two foil planes, wherein a first electrically insulating foil substrate is arranged in a first foil plane, and wherein a second electrically insulating foil substrate is arranged in a second foil plane, wherein the first foil substrate has a first main surface region on which at least one functional electronic component is arranged, wherein the second foil substrate has a cavity having at least one opening in the second main surface region, wherein the foil substrates within the foil substrate stack are arranged one above the other such that the functional electronic component arranged on the first foil substrate is arranged within the cavity provided in the second foil substrate.

A flexible sensing device includes a flexible substrate selected from a bismaleimide-triazine resin substrate, an ajinomoto build-up film substrate, and a polyimide film substrate. A plurality of first sensing stripes are formed on the flexible substrate and are spaced apart from each other in a first direction. A dielectric film is superposed on the first sensing stripes. A plurality of second sensing stripes are formed on the dielectric film and are spaced apart from each other in a second direction. Each second sensing stripe crosses over the first sensing stripes and is spaced apart from the first sensing stripes by the dielectric film. A method of making the same is also disclosed.

A method for producing a document structure, wherein the method includes producing a chip structure by forming a cavity in a carrier having a top side and an under side, picking up a chip having at least one chip contact and a redistribution layer (RDL) connected to the at least one chip contact by means of a picking-up device detaching the chip from an auxiliary carrier, wherein the chip bears on the auxiliary carrier by way of the RDL, wherein the chip is lifted up from the auxiliary carrier by means of pressure being exerted on the RDL, wherein the lifted-up chip is picked up and inserted into the cavity, and wherein the RDL is oriented on the top side of the carrier, fixing the chip in the cavity by means of an adhesive, electrically conductively connecting the at least one chip contact of the RDL to an electrically conductive region of the carrier by means of an electrically conductive material, and embedding the carrier between a first paper layer and a second paper layer.

Flexible modules and methods of manufacture are described. In an embodiment, a flexible module includes a flex board formed in which a passivation layer is applied in liquid form in a panel level process, followed by exposure and development. An electronic component is then mounted onto the flex board and encapsulated in a molding compound that is directly on a top surface of the passivation layer.

The present disclosure provides an electronic device including a substrate, an extending element, a conductive element and a first insulating layer. The substrate includes an edge. The extending element is disposed on the substrate and includes a first conductive layer and a semiconductor layer, the first conductive layer and the semiconductor layer are overlapped, and the semiconductor layer extends to the edge of the substrate. The conductive element is overlapped with the first conductive layer. The insulating layer is disposed between the conductive element and the extending element.

A structure including a three-dimensionally stretchable single crystalline semiconductor membrane located on a substrate is provided. The structure is formed by providing a three-dimensional (3D) wavy silicon germanium alloy layer on a silicon handler substrate. A single crystalline semiconductor material membrane is then formed on a physically exposed surface of the 3D wavy silicon germanium alloy layer. A substrate is then formed on a physically exposed surface of the single crystalline semiconductor material membrane. The 3D wavy silicon germanium alloy layer and the silicon handler substrate are thereafter removed providing the structure.

A semiconductor device comprises a lead, a board, and an electrically conductive layer on the board. The lead comprises a longitudinal axis and is soldered to the electrically conductive layer. The semiconductor device further comprises a first solder dam edge and a second solder dam edge, each positioned on the lead not more than 10 mils apart from each other along the longitudinal axis.

A chip on film, a display panel, and a method of manufacturing the display panel are provided. The chip on film includes a flexible film and a driver chip. The flexible film includes at least a first group of lines and a second group of lines. M lines of the first group of lines are electrically connected to pins of the driver chip to form driver lines; and N lines of the secondgroup of lines are not electrically connected to any pin of the driver chip, serving as nominal lines. By arranging the nominal lines, a conventional bonding machine may be applied to bond the chip on film to the display substrate. Costs for modifying the bonding machine may be reduced, and application scenarios of the chip on film may be increased.

A semiconductor device includes: a first insulating circuit substrate; a first semiconductor chip mounted on a top surface of the first insulating circuit substrate; a printed circuit board arranged over the first insulating circuit substrate; a first external terminal inserted to the printed circuit board and having one end bonded to the top surface of the first insulating circuit substrate; and a first pin inserted to the printed circuit board and having one end bonded to a top surface of the first semiconductor chip, wherein the first insulating circuit substrate and the printed circuit board having warps complimentary to each other.