Disclosed herein are structures, devices, and methods for electrostatic discharge protection (ESDP) in integrated circuits (ICs). For example, in some embodiments, an IC package support may include: a first conductive structure in a dielectric material; a second conductive structure in the dielectric material; and a material in contact with the first conductive structure and the second conductive structure, wherein the material includes a polymer, and the material is different from the dielectric material. The material may act as a dielectric material below a trigger voltage, and as a conductive material above the trigger voltage.

An article includes a solid circuit die on a first major surface of a substrate, wherein the solid circuit die includes an arrangement of contact pads, and wherein at least a portion of the contact pads in the arrangement of contact pads are at least partially exposed on the first major surface of the substrate to provide an arrangement of exposed contact pads; a guide layer including an arrangement of microchannels, wherein the guide layer contacts the first major surface of the substrate such that at least some microchannels in the arrangement of microchannels overlie the at least some exposed contact pads in the arrangement of exposed contact pads; and a conductive particle-containing liquid in at least some of the microchannels. Other articles and methods of manufacturing the articles are described.

Pastes are disclosed that are configured to coat a passage of a substrate. When the paste is sintered, the paste becomes electrically conductive so as to transmit electrical signals from a first end of the passage to a second end of the passage that is opposite the first end of the passage. The metallized paste contains a lead-free glass frit, and has a coefficient of thermal expansion sufficiently matched to the substrate so as to avoid cracking of the sintered paste, the substrate, or both, during sintering.

An IGBT module with a heat dissipation structure having a specific layer thickness ratio includes a layer of IGBT chips, an upper bonding layer, a circuit layer, an insulating layer, and a heat dissipation layer. The insulating layer is disposed on the heat dissipation layer, the circuit layer is disposed on the insulating layer, the upper bonding layer is disposed on the circuit layer, and the layer of IGBT chips is disposed on the upper bonding layer. A thickness of the insulating layer is less than 0.2 mm, a thickness of the circuit layer is between 1.5 mm and 3 mm, and a thickness ratio of the circuit layer to the insulating layer is greater than or equal to 7.5:1.

The technology relates to an integrated circuit (IC) package in which an interconnection interface chiplet and/or interconnection interface circuit are relocated, partitioned, and/or decoupled from a main or core IC die and/or high-bandwidth memory (HBM) components in an integrated component package.

A system and method of additively manufacturing a part including electrically conductive or static dissipating fluorine-containing polymers. The method includes depositing fluorine-containing polymer additive manufacturing material onto a build platform, selectively cross-linking portions of the deposited additive manufacturing material, and curing the selectively cross-linked portions such that the part is at least one of electrically conductive and static dissipating.

The present inventive concept relates to a copper based conductive paste and its preparation method. The copper based conductive paste comprises a copolymer-copper composite comprising an imidazole-silane copolymer with partially cross-linked structure and a copper powder, a solvent, a binder and an additive. The imidazole-silane copolymer with partially cross-linked structure is introduced into the copper powder whose surface is treated by a hydrochloric acid aqueous solution and a phosphoric acid aqueous solution. The imidazole-silane copolymer is polymerized by using an imidazole monomer represented by following formula 1, a silane monomer represented by following formula 2 and a cross-linking agent. ##STR00001## In Formula 1, X represents a hydrogen atom (H) or a methyl group (—CH.sub.3), and R.sub.1 represents a vinyl group or an allyl group. ##STR00002## In Formula 2, Y represents a methoxy group, a 2-methoxy ethoxy group or an acetoxy group, and R.sub.2 represents a vinyl group.

A contact element for use between electronic components like computer chips and printed circuit boards, or the connection between an electronic component in a test socket to provide high current, high density, and high frequency connections between the electronic components. The contact element preferably achieves a good connection between electrical components when they are connected and pressed together. The contact element is preferably made of a conductive silicone rubber which has been plated.

A system and method of additively manufacturing a part including electrically conductive or static dissipating fluorine-containing polymers. The method includes depositing fluorine-containing polymer additive manufacturing material onto a build platform, selectively cross-linking portions of the deposited additive manufacturing material, and curing the selectively cross-linked portions such that the part is at least one of electrically conductive and static dissipating.

A semiconductor device includes a main circuit region; and a scribe region surrounding the main circuit region; wherein the main circuit region and the scribe region comprises first and second insulating films and a low-k film formed therebetween; and wherein the low-k film of the scribe region includes a plurality of cavities lining along a border between. the main circuit region and the scribe region.