A heterojunction bipolar transistor includes an emitter layer on a base layer on a collector layer on an upper sub-collector layer over a bottom sub-collector layer, a first dielectric film over the bottom sub-collector layer, the base layer and the emitter layer, a base electrode on the first dielectric film, electrically connected to the base layer through at least one first via hole in the first dielectric film, a second dielectric film on the first dielectric film and the base electrode, and a conductive layer on the second dielectric film, with conductive layer electrically connected to base electrode through a second via hole disposed in the second dielectric film, first dielectric film between the base electrode and first sidewall of a stack including the base layer and the collector layer, and second via hole laterally separated from the base layer.

Device structures for a bipolar junction transistor and methods of fabricating a device structure for a bipolar junction transistor. A base layer comprised of a first semiconductor material is formed. An emitter layer comprised of a second semiconductor material is formed on the base layer. The emitter layer is patterned to form an emitter finger having a length and a width that changes along the length of the emitter finger.

Device structures and fabrication methods for a device structure. One or more trench isolation regions are formed in a substrate to surround a device region. A base layer is formed on the device region. First and second emitter fingers are formed on the base layer. A portion of the device region extending from the first emitter finger to the second emitter finger is free of dielectric material.

Bipolar transistors and MOS transistors are formed in a common process. A semiconductor layer is arranged on an insulating layer. On a side of the bipolar transistors: an insulating region including the insulating layer is formed; openings are etched through the insulating region to delimit insulating walls; the openings are filled with first epitaxial portions; and the first epitaxial portions and a first region extending under the first epitaxial portions and under the insulating walls are doped. On the side of the bipolar transistors and on a side of the MOS transistors: gate structures are formed; second epitaxial portions are made; and the second epitaxial portions covering the first epitaxial portions are doped.

A bipolar junction transistor having a relatively reduced size and an improved current gain and a method of manufacturing the same are disclosed. The bipolar junction transistor includes a plurality of emitter regions disposed in a substrate, a plurality of base regions disposed in the substrate and configured to surround the emitter regions, respectively, and a collector region disposed in the substrate and configured to surround the base regions. The plurality of emitter and base regions may be arranged in a matrix.

A method for forming a heterojunction bipolar transistor is provided. The method includes (a) forming a doped region in a group IV semiconductor layer of a substrate; (b) forming an epitaxially grown III-V semiconductor body on a surface portion of the doped region, the body extending from the surface portion and protruding vertically above the doped region, wherein the doped region and the body forms a first sub-collector part and a second sub-collector part, respectively; and (c) forming an epitaxially grown III-V semiconductor layer stack on the body, the layer stack comprising a collector, a base and an emitter. There is further provided a heterojunction bipolar transistor device.

The invention provides a structure of an emitter layer and a base layer that reduces the influence of a conduction band energy barrier generated at an interface between the emitter layer and the base layer on power amplifier characteristics for a GaAs HBT using InGaAs grown by pseudomorphic growth in the base layer. In the first invention, InGaP having a CuPt-type ordering is used in the emitter layer. In the second invention, a p-type impurity concentration of an InGaAs base layer grown by pseudomorphic growth is less in an emitter layer side portion than in a collector layer side portion.

A collector layer, a base layer, and an emitter layer that are disposed on a substrate form a bipolar transistor. An emitter electrode is in ohmic contact with the emitter layer. The emitter layer has a shape that is long in one direction in plan view. A difference in dimension with respect to a longitudinal direction of the emitter layer between the emitter layer and an ohmic contact interface at which the emitter layer and the emitter electrode are in ohmic contact with each other is larger than a difference in dimension with respect to a width direction of the emitter layer between the emitter layer and the ohmic contact interface.

A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.

The present application provides a BJT device structure and a method for making the same, the structure comprising an N+ region located on a P-well; a barrier layer structure located on the N+ region, the barrier layer structure being a frame structure surrounding the periphery of the N+ region, wherein a region in the barrier layer structure is an emitter region, a plurality of mutually spaced STI regions are provided on the N+ region of the emitter region; a base region located at the periphery of the emitter region; and a collector region located at the periphery of the base region. The STI region of the emitter region of the BJT device structure of the present application is a discontinuous structure, which can significantly reduce a recombination current of the emitter region and the base region, thereby effectively increasing the amplification factor of the BJT device.