Substrate-less lateral diode integrated circuit structures, and methods of fabricating substrate-less lateral diode integrated circuit structures, are described. For example, a substrate-less integrated circuit structure includes a fin or a stack of nanowires. A plurality of P-type epitaxial structures is over the fin or stack of nanowires. A plurality of N-type epitaxial structures is over the fin or stack of nanowires. One or more spacings are in locations over the fin or stack of nanowires, a corresponding one of the one or more spacings extending between neighboring ones of the plurality of P-type epitaxial structures and the plurality of N-type epitaxial structures.

A method for producing an edge structure of a semiconductor component includes: providing a semiconductor body having at least two mutually spaced-apart main faces respectively having an edge, between which edges an edge face extends; and etching a predetermined edge contour by purposely applying a chemical etchant onto the edge face by an etchant jet with simultaneous rotation of the semiconductor body about a rotation axis. The etchant jet is guided with a predetermined jet cross section, while being directed tangentially with respect to the edge face, such that the etchant jet impinges on the edge face only with a part of the jet cross section. A corresponding device for producing an edge structure of a semiconductor component is also described.

A power device includes: a diode section; a semiconductor body; a drift region extending into the diode section; trenches in the diode section and extending along a vertical direction into the semiconductor body, two adjacent trenches defining a respective mesa portion in the semiconductor body; a body region in the mesa portions; in the diode section, a barrier region between the body and drift regions and having a dopant concentration at least 100 times greater than an average dopant concentration of the drift region and a dopant dose greater than that of the body region. The barrier region has a lateral structure according to which at least 50% of the body region in the diode section is coupled to the drift region at least by the barrier region, and at least 5% of the body region in the diode section is coupled to the drift region without the barrier region.

A semiconductor device includes: a drift region of a first conductivity type arranged between first and second surfaces of a semiconductor body; a first region of the first conductivity type at the second surface; a second region of a second conductivity type adjacent the first region at the second surface; a field stop region of the first conductivity type between the drift region and second surface; and a first electrode on the second surface directly adjacent to the first region in a first part of the second surface and to the second region in a second part of the second surface. The field stop region includes first and second sub-regions. Over a predominant portion of the first part of the second surface, the second sub-region directly adjoins the first region and includes dopants of the second conductivity type that partially compensate dopants of the first conductivity type.

A semiconductor device includes a semiconductor substrate, an emitter region, a base region and multiple accumulation areas, and an upper accumulation area in the multiple accumulation areas is in direct contact with a gate trench section and a dummy trench section, in an arrangement direction that is orthogonal to a depth direction and an extending direction, a lower accumulation area furthest from the upper surface of the semiconductor substrate in the multiple accumulation areas has: a gate vicinity area closer to the gate trench section than the dummy trench section in the arrangement direction; and a dummy vicinity area closer to the dummy trench section than the gate trench section in the arrangement direction, and having a doping concentration of the first conductivity type lower than that of the gate vicinity area.

An RC IGBT includes: an active region with separate IGBT and diode sections; a semiconductor body forming a part of the active region; a first load terminal and control terminal at a first side of the body and a second load terminal at a second side, the control terminal including a control terminal finger that laterally overlaps, in the active region, with the diode section. Control trenches extending into the semiconductor body along a vertical direction have a control trench electrode electrically connected to the control terminal for controlling a load current between the load terminals in the IGBT section. At least one control trench extends into both IGBT and diode sections. The electrical connection between the control trench electrode of that control trench and the control terminal is established at least based on an electrically conductive member arranged, in the diode section, in contact with the control terminal finger.

A semiconductor device is proposed. The semiconductor device includes a semiconductor substrate including a RC-IGBT with a diode area. The diode area includes a p-doped anode region and an n-doped emitter efficiency adjustment region. At least one of the p-doped anode region or the n-doped emitter efficiency adjustment region includes deep level dopants.

A flexible wire comprises a conductive core surrounded by one or more radial p-n diodes and alternating conductive and non-conductive bands along an outermost surface. Methods for producing the wire are also disclosed, as are textiles and other flexible materials comprising or consisting of such flexible wires.

Plural sessions of proton irradiation are performed by differing ranges from a substrate rear surface side. After first to fourth n-type layers of differing depths are formed, the protons are activated. Next, helium is irradiated to a position deeper than the ranges of the proton irradiation from the substrate rear surface, introducing lattice defects. When the amount of lattice defects is adjusted by heat treatment, protons not activated in a fourth n-type layer are diffused, forming a fifth n-type layer contacting an anode side of the fourth n-type layer and having a carrier concentration distribution that decreases toward the anode side by a more gradual slope than that of the fourth n-type layer. The fifth n-type layer that includes protons and helium and the first to fourth n-type layers that include protons constitute an n-type FS layer. Thus, a semiconductor device having improved reliability and lower cost may be provided.

An integrated circuit includes a MOSFET device and a monolithic diode device, wherein the monolithic diode device is electrically connected in parallel with a body diode of the MOSFET device. The monolithic diode device is configured so that a forward voltage drop Vf.sub.D2 of the monolithic diode device is less than a forward voltage drop Vf.sub.D1 of the body diode of the MOSFET device. The forward voltage drop Vf.sub.D2 is process tunable by controlling a gate oxide thickness, a channel length and body doping concentration level. The tunability of the forward voltage drop Vf.sub.D2 advantageously permits design of the integrated circuit to suit a wide range of applications according to requirements of switching speed and efficiency.