An array substrate, a display panel and an operating method thereof are disclosed. The array substrate includes a base substrate; an imaging array disposed on the substrate, wherein the imaging array includes a photoelectric detection circuit and a temperature detection circuit, the photoelectric detection circuit includes a photosensitive sensor configured to detect light for imaging, and the temperature detection circuit includes a temperature sensitive sensor configured to detect temperature.

Devices including graphene quantum dots yield extremely high performance THz bolometers, by measuring the current of hot electrons formed in the graphene source and drain electrodes of the device and propagating through the graphene quantum dot connected thereto. Devices may also include additional materials such as MoS.sub.2, as well as one or more gate electrodes to alter performance as needed.

A source pad of a main semiconductor element is electrically connected to an n.sup.+-type source region via a barrier metal. A temperature sensing part is a poly-silicon diode formed by a pn junction between a p-type poly-silicon layer that is a p-type anode region and an n-type poly-silicon layer that is an n-type cathode region. The temperature sensing part is provided, via the field insulating film, on a front surface of a same semiconductor substrate as the main semiconductor element. An anode pad and a cathode pad are in direct contact with the p-type poly-silicon layer and the n-type poly-silicon layer, respectively. The source pad, the anode pad, and the cathode pad are aluminum alloy films.

An array substrate, a display panel and an operating method thereof are disclosed. The array substrate includes a base substrate; an imaging array disposed on the substrate, wherein the imaging array includes a photoelectric detection circuit and a temperature detection circuit, the photoelectric detection circuit includes a photosensitive sensor configured to detect light for imaging, and the temperature detection circuit includes a temperature sensitive sensor configured to detect temperature.

We disclose herein a CMOS-based sensing device comprising a substrate comprising an etched portion, a first region located on the substrate, wherein the first region comprises a membrane region formed over an area of the etched portion of the substrate, a flow sensor formed within the membrane region and a pressure sensor formed within the membrane region.

A power semiconductor circuit includes: a power semiconductor element having a gate electrode configured to actuate the power semiconductor element, a collector electrode, and an emitter electrode electrically connected to a first emitter terminal; and a temperature sensor having a first measurement point with a measurement terminal and a second measurement point electrically connected to the emitter electrode, so that a voltage which drops over the temperature sensor is measurable between the measurement terminal and the first emitter terminal for the temperature measurement. Corresponding methods for determining a temperature of a power semiconductor element and for determining a sign of a load current in a bridge circuit are also described.

A source pad of a main semiconductor element is electrically connected to an n.sup.+-type source region via a barrier metal. A temperature sensing part is a poly-silicon diode formed by a pn junction between a p-type poly-silicon layer that is a p-type anode region and an n-type poly-silicon layer that is an n-type cathode region. The temperature sensing part is provided, via the field insulating film, on a front surface of a same semiconductor substrate as the main semiconductor element. An anode pad and a cathode pad are in direct contact with the p-type poly-silicon layer and the n-type poly-silicon layer, respectively. The source pad, the anode pad, and the cathode pad are aluminum alloy films.

A device comprising a gate pad, a source pad and a passive actuator arranged to form a reversible mechanical and electrical connection between the gate pad and the source pad only if the temperature in the passive actuator exceeds a threshold value.

A semiconductor switch control device includes a first FET and a second FET arranged adjacent to each other, in which source terminals are connected in series. A drain terminal of the first FET is connected to a high voltage battery, and a drain terminal of the second FET is connected to a high voltage load. A controller determines a temperature state of a minus-side main relay including the second FET based on a forward voltage of a body diode of the first FET.

The semiconductor device of the present invention is a semiconductor device in which a first semiconductor chip including a first field effect transistor for a high-side switch, a second semiconductor chip including a second field effect transistor for a low-side switch, and a third semiconductor chip including a circuit that controls each of the first and second semiconductor chips are sealed with a sealing portion. A lead electrically connected to a pad of the first semiconductor chip for a source of the first field effect transistor and a lead electrically connected to a back-surface electrode of the second semiconductor chip for a drain of the second field effect transistor are disposed on the same side of the sealing portion in a plan view.