H01L2924/01017

Method for producing member for semiconductor device and semiconductor device, and member for semiconductor device

There is provided a method for producing a member for semiconductor device which can reduce generation of a large number of voids in a solder-bonded portion without increasing production cost. The method includes the step of preparing a first member including a metal portion capable of being bonded by solder and the step of coating the surface of the metal portion of the first member with a treatment agent to form a treated coating which vaporizes at a temperature lower than or equal to the solidus temperature of the solder.

Method for producing member for semiconductor device and semiconductor device, and member for semiconductor device

There is provided a method for producing a member for semiconductor device which can reduce generation of a large number of voids in a solder-bonded portion without increasing production cost. The method includes the step of preparing a first member including a metal portion capable of being bonded by solder and the step of coating the surface of the metal portion of the first member with a treatment agent to form a treated coating which vaporizes at a temperature lower than or equal to the solidus temperature of the solder.

Process for producing a structure by assembling at least two elements by direct adhesive bonding

A method for producing a structure by direct bonding of two elements, the method including: production of the elements to be assembled and assembly of the elements. The production of the elements to be assembled includes: deposition on a substrate of a TiN layer by physical vapor deposition, and deposition of a copper layer on the TiN layer. The assembly of the elements includes: polishing the surfaces of the copper layers intended to come into contact so that they have a roughness of less than 1 nm RMS and hydrophilic properties, bringing the surfaces into contact, and storing the structure at atmospheric pressure and at ambient temperature.

METHOD FOR PRODUCING MEMBER FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE, AND MEMBER FOR SEMICONDUCTOR DEVICE

There is provided a method for producing a member for semiconductor device which can reduce generation of a large number of voids in a solder-bonded portion without increasing production cost. The method includes the step of preparing a first member including a metal portion capable of being bonded by solder and the step of coating the surface of the metal portion of the first member with a treatment agent to form a treated coating which vaporizes at a temperature lower than or equal to the solidus temperature of the solder.

METHOD FOR PRODUCING MEMBER FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE, AND MEMBER FOR SEMICONDUCTOR DEVICE

There is provided a method for producing a member for semiconductor device which can reduce generation of a large number of voids in a solder-bonded portion without increasing production cost. The method includes the step of preparing a first member including a metal portion capable of being bonded by solder and the step of coating the surface of the metal portion of the first member with a treatment agent to form a treated coating which vaporizes at a temperature lower than or equal to the solidus temperature of the solder.

METAL PATCH, METHOD FOR MANUFACTURING THE SAME AND BONDING METHOD BY USING THE SAME
20170173718 · 2017-06-22 ·

A metal patch suitable for connecting a high-power element and a substrate is provided. The metal patch includes an intermediate metal layer, two first metal layers, and two second metal layers. The first metal layers are respectively disposed on two opposite surfaces of the intermediate metal layer. The intermediate metal layer is located between the first metal layers. The melting point of each of the first metal layers is greater than 800 C. The second metal layers are respectively disposed on the first metal layers. The intermediate metal layer and the first metal layers are located between the second metal layers. The material of each of the second metal layers includes an indium-tin alloy. Each of the first metal layers and the corresponding second metal layer can generate an intermetal via a solid-liquid diffusion reaction.

METAL PATCH, METHOD FOR MANUFACTURING THE SAME AND BONDING METHOD BY USING THE SAME
20170173718 · 2017-06-22 ·

A metal patch suitable for connecting a high-power element and a substrate is provided. The metal patch includes an intermediate metal layer, two first metal layers, and two second metal layers. The first metal layers are respectively disposed on two opposite surfaces of the intermediate metal layer. The intermediate metal layer is located between the first metal layers. The melting point of each of the first metal layers is greater than 800 C. The second metal layers are respectively disposed on the first metal layers. The intermediate metal layer and the first metal layers are located between the second metal layers. The material of each of the second metal layers includes an indium-tin alloy. Each of the first metal layers and the corresponding second metal layer can generate an intermetal via a solid-liquid diffusion reaction.

PROCESS FOR PRODUCING A STRUCTURE BY ASSEMBLING AT LEAST TWO ELEMENTS BY DIRECT ADHESIVE BONDING

A method for producing a structure by direct bonding of two elements, the method including: production of the elements to be assembled and assembly of the elements. The production of the elements to be assembled includes: deposition on a substrate of a TiN layer by physical vapor deposition, and deposition of a copper layer on the TiN layer. The assembly of the elements includes: polishing the surfaces of the copper layers intended to come into contact so that they have a roughness of less than 1 nm RMS and hydrophilic properties, bringing the surfaces into contact, and storing the structure at atmospheric pressure and at ambient temperature.

Bonding wire for semiconductor device use and method of production of same

Bonding wire for semiconductor device use where both leaning failures and spring failures are suppressed by (1) in a cross-section containing the wire center and parallel to the wire longitudinal direction (wire center cross-section), there are no crystal grains with a ratio a/b of a long axis a and a short axis b of 10 or more and with an area of 15 m.sup.2 or more (fiber texture), (2) when measuring a crystal direction in the wire longitudinal direction in the wire center cross-section, the ratio of crystal direction <100> with an angle difference with respect to the wire longitudinal direction of 15 or less is, by area ratio, 10% to less than 50%, and (3) when measuring a crystal direction in the wire longitudinal direction at the wire surface, the ratio of crystal direction <100> with an angle difference with respect to the wire longitudinal direction of 15 or less is, by area ratio, 70% or more. During the drawing step, a drawing operation with a rate of reduction of area of 15.5% or more is performed at least once. The final heat treatment temperature and the pre-final heat treatment temperature are made predetermined ranges.

Bonding wire for semiconductor device use and method of production of same

Bonding wire for semiconductor device use where both leaning failures and spring failures are suppressed by (1) in a cross-section containing the wire center and parallel to the wire longitudinal direction (wire center cross-section), there are no crystal grains with a ratio a/b of a long axis a and a short axis b of 10 or more and with an area of 15 m.sup.2 or more (fiber texture), (2) when measuring a crystal direction in the wire longitudinal direction in the wire center cross-section, the ratio of crystal direction <100> with an angle difference with respect to the wire longitudinal direction of 15 or less is, by area ratio, 10% to less than 50%, and (3) when measuring a crystal direction in the wire longitudinal direction at the wire surface, the ratio of crystal direction <100> with an angle difference with respect to the wire longitudinal direction of 15 or less is, by area ratio, 70% or more. During the drawing step, a drawing operation with a rate of reduction of area of 15.5% or more is performed at least once. The final heat treatment temperature and the pre-final heat treatment temperature are made predetermined ranges.