A 4D device comprises a 2D multi-core logic and a 3D memory stack connected through the memory stack sidewall using a fine pitch T&J connection. The 3D memory in the stack is thinned from the original wafer thickness to no remaining Si. A tongue and groove device at the memory wafer top and bottom surfaces allows an accurate stack alignment. The memory stack also has micro-channels on the backside to allow fluid cooling. The memory stack is further diced at the fixed clock-cycle distance and is flipped on its side and re-assembled on to a template into a pseudo-wafer format. The top side wall of the assembly is polished and built with BEOL to fan-out and use the T&J fine pitch connection to join to the 2D logic wafer. The other side of the memory stack is polished, fanned-out, and bumped with C4 solder. The invention also comprises a process for manufacturing the device. In another aspect, the invention comprises a 4D process and device for over 50× greater than 2D memory density per die and an ultra high density memory.

A curable silicone composition for die bonding use contains at least (A) an organopolysiloxane having at least two alkenyl groups per molecule, (B) an organopolysiloxane having at least two siloxane units each represented by the formula: RHSiO (wherein R represents a monovalent hydrocarbon group having 1 to 12 carbon atoms and having no aliphatic unsaturated bond) per molecule, (C) a platinum-group metal-based catalyst for hydrosilylation reactions, (D) a hydrosilylation reaction inhibitor and (E) an adhesiveness-imparting agent, wherein the scorch time (ts1), which is defined in JIS K 6300-2, at a die bonding temperature is 20 to 60 seconds, and the 90% vulcanization time [tc(90)] with respect to the maximum torque value during the vulcanization time of 600 seconds is 300 to 500 seconds. The curable silicone composition for die bonding use according to the present invention can adhere a semiconductor chip to a support strongly.

An optical device package comprises a carrier having a first surface and a second surface recessed with respect to the first surface and a lid disposed on the second surface of the carrier.

An optical device package comprises a carrier having a first surface and a second surface recessed with respect to the first surface and a lid disposed on the second surface of the carrier.

The method of producing an electronic component (100) comprises a step A) of providing a semiconductor chip (2) having an underside (20), having a plurality of contact pins (21), and having at least one positioning pin (25) protruding from the underside. The contact pins are adapted to electrically contact the semiconductor chip. The positioning pin narrows in the direction away from the underside and protrudes further from the underside than the contact pins. The semiconductor chip is placed on the connection carrier, with the contact pins each being inserted into a contact recess and the positioning pin being inserted into the positioning recess. The contact pins are immersed in the molten solder material.

A component carrier has a stack including at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A component is embedded in the stack. The component includes a redistribution structure with at least one vertically protruding electrically conductive pad, and an electrically conductive material on at least part of said at least one pad. A method of manufacturing a component carrier is also disclosed.

The wafer-level manufacturing method makes possible to manufacture ultrathin optical devices such as opto-electronic modules. A clear encapsulation is applied to an initial wafer including active optical components and a wafer-size substrate. Thereon, a photostructurable opaque coating is produced which includes apertures. Then, trenches are produced which extend through the clear encapsulation and establish side walls of intermediate products. Then, an opaque encapsulation is applied to the intermediate products, thus filling the trenches. Cutting through the opaque encapsulation material present in the trenches, singulated optical modules are produced, wherein side walls of the intermediate products are covered by the opaque encapsulation material. The wafer-size substrate can be attached to a rigid carrier wafer during most process steps.

An optical device package comprises a carrier having a first surface and a second surface recessed with respect to the first surface and a lid disposed on the second surface of the carrier.

Embodiments of this application disclose an optoelectronic component and a fabrication method thereof. The optoelectronic component includes a capacitor, an inductor, a carrier component, and an optoelectronic element, where the capacitor, the inductor, and the optoelectronic element are all disposed on the carrier component. The inductor and the capacitor are configured to form a resonant circuit, where a resonance frequency of the resonant circuit is correlated with a signal output frequency of the optoelectronic element. A first electrode of the optoelectronic element is connected to a first electrode of the carrier component through the inductor, and a second electrode of the optoelectronic element is connected to a second electrode of the carrier component. A first electrode of the capacitor is connected to the first electrode of the carrier component, and a second electrode of the capacitor is connected to the second electrode of the carrier component.

The disclosure discloses an optoelectronic element comprising: an optoelectronic unit comprising a first metal layer, a second metal layer, and an outermost lateral surface; an insulating layer having a first portion overlapping the optoelectronic unit and extending beyond the lateral surface, and a second portion separated from the first portion in a cross-sectional view; and a first conductive layer formed on the insulating layer.