A low cost IC solution is disclosed to provide Super CMOS microelectronics macros. Hereinafter, the Super CMOS or Schottky CMOS all refer to SCMOS. The SCMOS device solutions with a niche circuit element, the complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co/Ti) to P— and N—Si beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros include diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form generic logic gates, memory cores, and analog functional blocks from simple to the complicated, from discrete components to all grades of VLSI chips. Solar photon voltaic electricity conversion and bio-lab-on-a-chip are two newly extended fields of the SCMOS IC applications.

A low cost IC solution is disclosed to provide Super CMOS microelectronics macros. Hereinafter, the Super CMOS or Schottky CMOS all refer to SCMOS. The SCMOS device solutions with a niche circuit element, the complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co/Ti) to P— and N—Si beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros include diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form generic logic gates, memory cores, and analog functional blocks from simple to the complicated, from discrete components to all grades of VLSI chips. Solar photon voltaic electricity conversion and bio-lab-on-a-chip are two newly extended fields of the SCMOS IC applications.

A five junction solar cell and its method of manufacture including an upper first solar subcell composed of a semiconductor material having a first band gap; a second solar subcell adjacent to said first solar subcell and composed of a semiconductor material having a second band gap smaller than the first band gap and being lattice matched with the upper first solar subcell; a third solar subcell adjacent to said second solar subcell and composed of a semiconductor material having a third band gap smaller than the second band gap and being lattice matched with the second solar subcell; a fourth solar subcell adjacent to said second solar subcell and composed of a semiconductor material having a fourth band gap smaller than the third band gap and being lattice matched with respect to the third solar subcell; a graded interlayer adjacent to the fourth solar subcell and having a fifth band gap greater than the fourth band gap; and a bottom solar subcell adjacent to the graded interlayer and being lattice mismatched from the fourth solar subcell and having a sixth band gap smaller than the fifth band gap.

A five junction solar cell and its method of manufacture including an upper first solar subcell composed of a semiconductor material having a first band gap; a second solar subcell adjacent to said first solar subcell and composed of a semiconductor material having a second band gap smaller than the first band gap and being lattice matched with the upper first solar subcell; a third solar subcell adjacent to said second solar subcell and composed of a semiconductor material having a third band gap smaller than the second band gap and being lattice matched with the second solar subcell; a fourth solar subcell adjacent to said second solar subcell and composed of a semiconductor material having a fourth band gap smaller than the third band gap and being lattice matched with respect to the third solar subcell; a graded interlayer adjacent to the fourth solar subcell and having a fifth band gap greater than the fourth band gap; and a bottom solar subcell adjacent to the graded interlayer and being lattice mismatched from the fourth solar subcell and having a sixth band gap smaller than the fifth band gap.

Device structures, apparatuses, and methods are disclosed for photovoltaic cells that may be a single junction or multijunction solar cells, with at least one layer comprising a group-IV semiconductor in which part of the cell comprises a second layer comprising a III-V semiconductor or group-IV semiconductor having a different composition than the group-IV semiconductor of the first layer, such that a heterostructure is formed between the first and second layers.

Device structures, apparatuses, and methods are disclosed for photovoltaic cells that may be a single junction or multijunction solar cells, with at least one layer comprising a group-IV semiconductor in which part of the cell comprises a second layer comprising a III-V semiconductor or group-IV semiconductor having a different composition than the group-IV semiconductor of the first layer, such that a heterostructure is formed between the first and second layers.

A multijunction solar cell in accordance with an example implementation includes a growth substrate; a first solar subcell disposed over or in the growth substrate; a tunnel diode disposed over the first solar subcell; and a grading interlayer directly disposed over the tunnel diode; a sequence of layers of semiconductor material forming a solar cell disposed over the grading interlayer comprising a plurality of solar subcells. The multijunction solar cell also includes a first wafer bowing inhibition layer disposed directly over an uppermost sublayer of the grading interlayer, such bowing inhibition layer having an in-plane lattice constant greater than the in-plane lattice constant of the uppermost sublayer of the grading interlayer. A second wafer bowing inhibition layer is disposed directly over the first wafer bowing inhibition layer.

A multijunction solar cell in accordance with an example implementation includes a growth substrate; a first solar subcell disposed over or in the growth substrate; a tunnel diode disposed over the first solar subcell; and a grading interlayer directly disposed over the tunnel diode; a sequence of layers of semiconductor material forming a solar cell disposed over the grading interlayer comprising a plurality of solar subcells. The multijunction solar cell also includes a first wafer bowing inhibition layer disposed directly over an uppermost sublayer of the grading interlayer, such bowing inhibition layer having an in-plane lattice constant greater than the in-plane lattice constant of the uppermost sublayer of the grading interlayer. A second wafer bowing inhibition layer is disposed directly over the first wafer bowing inhibition layer.

A method for passing photovoltaic current between a subcell formed from a single crystal Group ll-VI semiconductor material and a subcell formed from a single crystal Group IV semiconductor material, includes the steps of forming a first subcell by an epitaxial growth process, the first subcell having a first upper surface; forming a tunnel heterojunction between the first subcell and the second subcell, and tunneling carriers formed by light incident on the first and second subcells through the tunnel heterojunction, thereby permitting a photoelectric series current to flow through the first and second subcells.

A method for passing photovoltaic current between a subcell formed from a single crystal Group ll-VI semiconductor material and a subcell formed from a single crystal Group IV semiconductor material, includes the steps of forming a first subcell by an epitaxial growth process, the first subcell having a first upper surface; forming a tunnel heterojunction between the first subcell and the second subcell, and tunneling carriers formed by light incident on the first and second subcells through the tunnel heterojunction, thereby permitting a photoelectric series current to flow through the first and second subcells.