A semiconductor light-emitting element having a structure in which a substrate, a first reflector, a resonator cavity including an active layer, a second reflector and a transparent conductive film are stacked in this sequence, the semiconductor light-emitting element comprising: a first current constriction portion configured with an oxidation constriction layer; and a second current constriction portion configured with an insulation film, which is formed on an upper face of the second reflector and has an opening, and a contact portion between the transparent conductive film and a semiconductor layer with which the transparent conductive film is in contact, wherein a width d2 of the second current constriction portion is smaller than a width d1 of the first current constriction portion.

A semiconductor light-emitting element having a structure in which a substrate, a first reflector, a resonator cavity including an active layer, a second reflector and a tunnel junction portion are stacked in this sequence, comprising: a first current constriction portion configured with an oxidation constriction layer; and a second current constriction portion including the tunnel junction portion, wherein a width d2 of the second current constriction portion is smaller than a width d1 of the first current constriction portion.

A light source device in which a plurality of semiconductor light-emitting elements are disposed, each of the plurality of semiconductor light-emitting elements being configured with a first reflector, a resonator cavity including an active layer, and a second reflector which are stacked in this sequence on a semiconductor substrate, wherein in each of the semiconductor light-emitting elements, an electric contact region for supplying carriers to the active layer is disposed on a surface of the second reflector on an opposite side thereof to the active layer, and wherein the plurality of semiconductor light-emitting elements include a first semiconductor light-emitting element of which shape of the contact region is a first shape, and a second semiconductor light-emitting element of which shape of the contact region is a second shape which is different from the first shape.

In some implementations, a vertical cavity surface emitting laser (VCSEL) device includes a substrate; a first mirror disposed over the substrate; a bonding layer disposed over the first mirror; and an active region disposed over the bonding layer. The substrate is a gallium arsenide (GaAs) substrate, and the active region is an indium phosphide (InP)-based active region.

A Vertical Cavity Surface Emitting Laser (VCSEL) including a light emitting III-nitride active region including quantum wells (QWs), wherein each of the quantum wells have a thickness of more than 8 nm, a cavity length of at least 7 λ, or at least 20 λ, where lambda is a peak wavelength of the light emitted from the active region, layers with reduced surface roughness, a tunnel junction intracavity contact. The VCSEL is flip chip bonded using In—Au bonding. This is the first report of a VCSEL capable of continuous wave operation.

A vertical cavity light-emitting element includes a substrate, a first multilayer film reflecting mirror, a semiconductor structure layer, an electrode, an electrode layer, and a second multilayer film reflecting mirror. The first multilayer film reflecting mirror is formed on the substrate. The semiconductor structure layer includes a nitride semiconductor. The nitride semiconductor includes a first semiconductor layer that is formed on the first multilayer film reflecting mirror and is a first conductivity type, a second semiconductor layer that is formed on the first semiconductor layer and is the first conductivity type, a light-emitting layer that is formed on the second semiconductor layer and is configured to expose a region including an outer edge of a top surface of the second semiconductor layer, and a third semiconductor layer that is formed on the light-emitting layer and is a second conductivity type opposite to the first conductivity type. The electrode is formed on the top surface of the second semiconductor layer. The electrode layer is electrically in contact with the third semiconductor layer in one region of a top surface of the third semiconductor layer. The second multilayer film reflecting mirror constitutes a resonator with the first multilayer film reflecting mirror. The second semiconductor layer has a larger resistance than the first semiconductor layer.

A semiconductor laser light-emitting structure includes a semiconductor laser light-emitting structure having a vertical-cavity surface-emitting laser structure and configured to emit light having a first wavelength, and a wavelength converter including a metasurface and monolithically formed with the semiconductor laser light-emitting structure on a light output side of the semiconductor laser light-emitting structure, wherein the metasurface is configured to non-linearly convert the light having the first wavelength into light having a second wavelength.

A circuit (e.g., for use in a time-of-flight camera projector module) may include a top metal layer having an anode and a cathode, one or more capacitors connected to the anode, a vertical-cavity surface-emitting laser connected to the anode and the cathode, and a driver connected to the cathode. The circuit may further include a bottom metal layer connected to ground and arranged below the top metal layer, and a dielectric layer separating the top metal layer and the bottom metal layer. In some implementations, the dielectric layer has a thickness under sixty micrometers and a thermal resistance under fifteen degrees Celsius per watt. Accordingly, a current loop flowing vertically across the dielectric layer has a low self-inductance based on the thickness of the dielectric layer and the bottom metal layer is arranged to dissipate heat generated by the current loop flowing vertically across the dielectric layer.

A device, such as a light-emitting device, e.g. a laser device, comprising: a plurality of group III-V semiconductor NWs grown on one side of a graphitic substrate, preferably through the holes of an optional hole-patterned mask on said graphitic substrate; a first distributed Bragg reflector or metal mirror positioned substantially parallel to said graphitic substrate and positioned on the opposite side of said graphitic substrate to said NWs; optionally a second distributed Bragg reflector or metal mirror in contact with the top of at least a portion of said NWs; and wherein said NWs comprise aim-type doped region and a p-type doped region and optionally an intrinsic region there between.

Methods for forming an at least partially oxidized confinement layer of a semiconductor device and corresponding semiconductor devices are provided. The method comprises forming two or more layers of a semiconductor device on a substrate. The layers include an exposed layer and a to-be-oxidized layer. The to-be-oxidized layer is disposed between the substrate and the exposed layer. The method further comprises etching, using a masking process, a pattern of holes that extend through the exposed layer at least to a first surface of the to-be-oxidized layer. Each hole of the pattern of holes extends in a direction that is transverse to a level plane that is parallel to the first surface of the to-be-oxidized layer. The method further comprises oxidizing the to-be-oxidized layer through the pattern of holes by exposing the two or more layers of the semiconductor device to an oxidizing gas to form a confinement layer.