A laser structure, including: a dielectric matrix formed of a first material; a laser source formed within the dielectric matrix and formed of a semiconductor material; and a plurality of side confining features formed within the dielectric matrix and extending parallel to and along a length of the laser source. The plurality of side confining features are formed of the semiconductor material.

Methods for fabricating ultraviolet laser diode devices include providing substrate members comprising gallium and nitrogen or aluminum and nitrogen, forming an epitaxial material overlying a surface region of the substrate members, patterning the epitaxial material to form epitaxial mesa regions, depositing a bond media on at least one of the epitaxial mesa regions, bonding the bond media on at least one of the epitaxial mesa regions to a handle substrate, subjecting the sacrificial layer to an energy source to initiate release of the substrate member and transfer the at least one of the epitaxial mesa regions to the handle substrate, and processing the at least one of the epitaxial mesa regions to form the ultraviolet laser diode device.

Hybrid silicon lasers are provided including a bulk silicon substrate, a localized insulating layer that extends on at least a portion of the bulk silicon substrate, an optical waveguide structure on an upper surface of the localized insulating layer. The optical waveguide structure includes an optical waveguide including a silicon layer. A lasing structure is provided on the optical waveguide structure.

A method of producing laser bars or semiconductor lasers includes providing a carrier composite to form a plurality of carriers for the laser bars or for the semiconductor lasers, providing a semiconductor body composite including a common substrate and a common semiconductor layer sequence grown thereon, forming a plurality of separation trenches through the common semiconductor layer sequence such that the semiconductor body composite is divided into a plurality of semiconductor bodies, applying the semiconductor body composite to the carrier composite such that the separation trenches face the carrier composite, thinning or removing the common substrate, and singulating the carrier composite into a plurality of carriers, wherein a plurality of semiconductor bodies are arranged on one of the carriers, and the semiconductor bodies arranged on one common carrier are laterally spaced apart from one another by the separation trenches.

The embodiment relates to a light-emitting device in which a positional relationship between a modified refractive index region's gravity-center position and the associated lattice point differs from a conventional device, and a production method. In this device, a stacked body including a light-emitting portion and a phase modulation layer optically coupled to the light-emitting portion is on a substrate. The phase modulation layer includes a base layer and plural modified refractive index regions in the base layer. Each modified refractive index region's gravity-center position locates on a virtual straight line passing through a corresponding reference lattice point among lattice points of a virtual square lattice on the base layer's design plane. A distance between the reference lattice point and the modified refractive index region's gravity center along the virtual straight line is individually set such that this device outputs light forming an optical image.

A light emitting device includes: a first n-type semiconductor layer disposed on a substrate; a tunnel junction layer disposed on a part of the first n-type semiconductor layer; a p-type semiconductor layer disposed on the first n-type semiconductor layer and covering the tunnel junction layer; an active layer disposed on the p-type semiconductor layer; and a second n-type semiconductor layer disposed on the active layer.

A VCSEG-DFB laser, fully compatible with MGVI design and manufacturing methodologies, for single growth monolithic integration in multi-functional PICs is presented. It comprises a laser PIN structure, in mesa form, etched from upper emitter layer top surface through the active, presumably MQW, gain region, down to the top surface of the lower emitter. Lower electrical contacts sit adjacent the mesa disposed on the lower emitter layer with upper strip contacts disposed atop the upper emitter layer on the mesa top. An SEG is defined/etched from mesa top surface, between the upper strip contacts, through upper emitter layer down to or into the SCH layers. Vertical confinement is provided by the SCH structure and the lateral profile in the bottom portion of the mesa provides lateral confinement. The guided mode interacts with the SEG by the vertical tail penetrating the SEG and evanescent field coupling to the SEG.

A light emitting device includes: a first n-type semiconductor layer disposed on a substrate; a tunnel junction layer disposed on a part of the first n-type semiconductor layer; a p-type semiconductor layer disposed on the first n-type semiconductor layer and covering the tunnel junction layer; an active layer disposed on the p-type semiconductor layer; and a second n-type semiconductor layer disposed on the active layer.

A VCSEG-DFB laser, fully compatible with MGVI design and manufacturing methodologies, for single growth monolithic integration in multi-functional PICs is presented. It comprises a laser PIN structure, in mesa form, etched from upper emitter layer top surface through the active, presumably MQW, gain region, down to the top surface of the lower emitter. Lower electrical contacts sit adjacent the mesa disposed on the lower emitter layer with upper strip contacts disposed atop the upper emitter layer on the mesa top. An SEG is defined/etched from mesa top surface, between the upper strip contacts, through upper emitter layer down to or into the SCH layers. Vertical confinement is provided by the SCH structure and the lateral profile in the bottom portion of the mesa provides lateral confinement. The guided mode interacts with the SEG by the vertical tail penetrating the SEG and evanescent field coupling to the SEG.

A semiconductor optical integrated device includes: a substrate; at least a lower cladding layer, a waveguide core layer, and an upper cladding layer sequentially layered on the substrate, a buried hetero structure waveguide portion having a waveguide structure in which a semiconductor cladding material is embedded near each of both sides of the waveguide core layer; and a ridge waveguide portion having a waveguide structure in which a semiconductor layer including at least the upper cladding layer protrudes in a mesa shape. Further, a thickness of the upper cladding layer in the buried hetero structure waveguide portion is greater than a thickness of the upper cladding layer in the ridge waveguide portion.