With the disclosed device, a control method is set forth to control the flow of power between an electrical source and an electrical load.

With the disclosed device, a control method is set forth to control the flow of power between an electrical source and an electrical load.

The design of high-power RF amplifiers, specifically the design of the output transformer, is complicated by the relatively low voltage provided by battery packs that are practical for handheld devices meant for possibly delicate uses. Provided is an RF amplifier with one or more taps on the primary coil, wherein each tap is controlled by a half bridge driver. The output transformer primary winding may be driven between any two half bridge drivers, with the number of turns between the half bridge drivers and the fixed output winding determining the overall turns ration for the transformer.

The design of high-power RF amplifiers, specifically the design of the output transformer, is complicated by the relatively low voltage provided by battery packs that are practical for handheld devices meant for possibly delicate uses. Provided is an RF amplifier with one or more taps on the primary coil, wherein each tap is controlled by a half bridge driver. The output transformer primary winding may be driven between any two half bridge drivers, with the number of turns between the half bridge drivers and the fixed output winding determining the overall turns ration for the transformer.

The disclosure relates to a method and a control device for controlling at power semiconductor switches connected in parallel for switching a total current. The semiconductor switches each have a gate terminal. An input terminal for feeding the total current, an output terminal for discharging the total current, and a joint control terminal for receiving a joint control signal that has the state disconnect or connect are provided. The power semiconductor switches are each connected between to the input terminal and the output terminal. At least one ascertainment unit is designed to receive the joint control signal, ascertain individual control signals in accordance with the joint control signal to control the individual power semiconductor switches, and output the individual control signals to the gate terminals of the power semiconductor switches. The individual control signals each have the state disconnect or connect and differ at least temporarily.

This disclosure relates to switch mode multiphase DC-DC voltage regulator circuits. In prior art regulators, for standard load transients, the worst voltage undershoot happens during a zero to max, i.e., load step operation. When the load is released, the inductor current ramps down, eventually crossing zero, where it is then held at a negative current limit (i.e., NLIMIT) by a Negative Current Limit Detector Circuit. However, if the next load step were to happen right at the instant when the inductor hits the negative current limit, it would take additional time recover to zero before it could catch up to the load step, thus causing additional voltage drop. Regulators disclosed herein comprise specialized zero crossing detection circuitry that intelligently prevents the inductor currents in one or more of the phases of the regulator from ramping below zero, thereby improving voltage droop in the system during fast positive load transients.

This application describes examples of a grid-tied inverter apparatus and a grid-tied control method. In one example, the grid-tied inverter apparatus includes an inverter circuit, a controller, and a filter circuit. The controller is configured to adjust switching frequencies of a plurality of power switching transistors based on an output current value of the inverter apparatus, to adjust a resonance frequency of the filter circuit through different resonant branches, so that the resonance frequency meets a grid-tied requirement.