Microwave amplifiers tolerant to electrical overstress are provided. In certain embodiments, a monolithic microwave integrated circuit (MMIC) includes a signal pad that receives a radio frequency (RF) signal, a ground pad, a balun including a primary section that receives the RF signal and a secondary section that outputs a differential RF signal, an amplifier that amplifies the differential RF signal, and a plurality of decoupling elements, some of them electrically connected between the primary section and the ground pad, others electrically connected in the secondary section to a plurality of the amplifier's nodes, and operable to protect the amplifier from electrical overstress. Such electrical overstress events can include electrostatic discharge (ESD) events, such as field-induced charged-device model (FICDM) events, as well as other types of overstress conditions.

A power amplifier system for amplifying a radio frequency signal can have a driver transistor coupled to a radio frequency signal input. The system can also have a transformer balun with a main primary coil connected between the driver transistor and a voltage supply node of the power amplifier system, a secondary coil magnetically coupled to the main primary coil, and an additional primary coil configured to generate a feedback signal related to a signal induced in the main primary coil. A neutralization diode can be configured to use the feedback signal to reduce a gain variation resulting from variations in a voltage supplied from the voltage supply node of the power amplifier system. The neutralization diode can be connected between the additional primary coil and the driver transistor. Through envelope tracking, voltage supplied through the voltage supply node can change in relation to an envelope of the radio frequency signal.

A wide band matching network for power amplifier impedance matching, the wide band matching network comprising: a power amplifier transistor connected to an output network; the output network including: a series capacitor; an on-chip transformer connected to the capacitor in series, wherein the transformer and the capacitor act as a second order filter; and a port connected to the capacitor and a receiver switch.

An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more power amplifiers for amplifying a signal for transmission through the antenna. Radio-frequency power amplifier circuitry may include an amplifier, an input transformer for coupling radio-frequency input signals to the amplifier, an active inductor load coupled to the input transformer, and a second order intermodulation generation circuit configured to generate and inject a second order intermodulation product into the input transformer. The injected second order intermodulation product can be used to cancel out unwanted third order intermodulation products generated by the amplifier, which reduces intermodulation distortion experienced by the amplifier circuitry.

A wide band matching network for power amplifier impedance matching, the wide band matching network comprising: a power amplifier transistor connected to an output network; the output network including: a series capacitor; an on-chip transformer connected to the capacitor in series, wherein the transformer and the capacitor act as a second order filter; and a port connected to the capacitor and a receiver switch.

A radiofrequency power amplifier includes a balun transformer and a plurality of power transistor pairs arranged in a push-pull configuration. The balun transformer has an unbalanced coil extending between a first single-ended signal terminal and a first reference, and a balanced coil extending between a first balanced signal terminal and a second balanced signal terminal. The balun transformer also includes an auxiliary coil electrically isolated from the unbalanced coil and the balanced coil. The auxiliary coil is inductively coupled to the unbalanced coil and extends between a third balanced signal terminal and a fourth balanced signal terminal forming a balanced combiner-divider. An output of a first one of the power transistor pairs is coupled to the first and second balanced signal terminals and an output of a second one of the power transistor pairs is coupled to the third and fourth balanced signal terminals.

A band-switching network includes a dual-band balun and a switch network. The dual-band balun includes a first output and a second output. The switch network includes a first switch and a second switch in which an input to the first switch is coupled to the first output and an input to the second switch is coupled to the second balanced output. The dual-band balun further includes a primary coil, a first secondary coil and a second secondary coil in which the first secondary coil is coupled to the first balanced output and the second secondary coil is coupled to the second balanced output. In one embodiment, the primary coil and the first secondary coil are coupled by a first coupling factor k.sub.1, and the primary coil and the second secondary coil are coupled by a second coupling factor k.sub.2 that is different from the first coupling factor k.sub.1.

A higher-speed operation of a power amplifier circuit is achieved. A power amplifier circuit includes multi-stage amplifier units, an ET terminal, and an APT terminal. The multi-stage amplifier units include a final-stage amplifier unit. The final-stage amplifier unit includes a first amplifier element and a second amplifier element that are connected in parallel with each other. The first amplifier element is connected to the ET terminal. The second amplifier element is connected to the APT terminal.

Embodiments of the present disclosure provide apparatuses and methods for balancing parasitic capacitances between metal tracks in an integrated circuit chip. Specifically, additional capacitances in the form of, for example, tab capacitors, are attached to the metal tracks with the intention of detaching a select number of the attached capacitances for the purpose of balancing the parasitic capacitances between the metal tracks. The attached capacitances may be structural metal elements. Further, the attached structural metal elements may be detachable at thin-film resistive material associated with each of the attached structural metal elements.

An integrated circuit chip includes a first single-ended-to-differential amplifier configured to generate a differential output associated with an input of said first single-ended-to-differential amplifier; a second single-ended-to-differential amplifier arranged in parallel with said first single-ended-to-differential amplifier; a first set of switch circuits arranged downstream of said first single-ended-to-differential amplifier; a second set of switch circuits arranged downstream of said second single-ended-to-differential amplifier; and a first differential-to-single-ended amplifier arranged downstream of a first one of said switch circuits in said first set and downstream of a first one of said switch circuits in said second set.