A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.

RF receive circuitry, which includes a first output impedance matching circuit coupled to a first alpha output of a first alpha LNA, a second output impedance matching circuit coupled to a first beta output of a first beta LNA, and a first dual output RF LNA, is disclosed. The first dual output RF LNA includes the first alpha LNA, the first beta LNA, and a first gate bias control circuit, which is coupled between a first alpha input of the first alpha LNA and ground; is further coupled between a first beta input of the first beta LNA and the ground; is configured to select one of enabled and disabled of the first alpha LNA using an alpha bias signal via the first alpha input; and is further configured to select one of enabled and disabled of the first beta LNA using a beta bias signal via the first beta input.

An inverting amplifier includes an input terminal, an output terminal, a PMOS transistor, another PMOS transistor, an NMOS transistor, another NMOS transistor, and a clamp circuit. The PMOS transistors are connected in series between a supply voltage and an output terminal. The NMOS transistors are connected in series between a ground voltage and the output terminal. The clamp circuit is connected to the gate of the other PMOS transistor and the gate of the other NMOS transistor. The clamp circuit includes a switch, a capacitor, another switch, and another capacitor. At least one of the gate of the PMOS transistor and the gate of the NMOS transistor is connected to the input terminal.

Amplifiers with wide input range and low input capacitance are provided. In certain embodiments, an amplifier input stage includes a pair of input terminals, a pair of n-type input transistors, a first pair of isolation switches connected between the input terminals and the n-type input transistors, a pair of p-type input transistors, and a second pair of isolation switches connected between the input terminals and the p-type input transistors. The amplifier input stage further includes a control circuit that determines whether to use the n-type input transistors and/or the p-type input transistors for amplification based on a detected common-mode voltage of the input terminals. The control circuit opens the first pair of isolation switches to decouple the input terminals from the n-type input transistors when unused, and opens the second pair of isolation switches to decouple the input terminals from the p-type input transistors when unused.

A radio-frequency (RF) amplifier circuit facilites carrier-aggregation (CA) operation in a wireless communication network. A first amplifier subcircuit is coupled to an input node, and a second amplifier subcircuit is coupled to the input node. An amplifier subcircuit selector is to selectively enable operation of the first amplifier subcircuit, the second amplifier subcircuit, or the first and the second amplifier subcircuits together, in response to a selection indication. A reactive coupling network is arranged to selectively adjust the input impedance at the input node in response to the selection indication to reduce the input impedance variation.

A Doherty amplifier including a main amplifier and a peak amplifier is mounted on a package substrate. A low noise amplifier is further mounted on the package substrate. A transmit/receive switch switches in terms of time between a transmission connection state in which an output signal of the Doherty amplifier is supplied to an antenna and a reception connection state in which a signal received by the antenna is inputted to the low noise amplifier.

A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.

Processes and systems for producing glass fibers having regions devoid of glass using submerged combustion melters, including feeding a vitrifiable feed material into a feed inlet of a melting zone of a melter vessel, and heating the vitrifiable material with at least one burner directing combustion products of an oxidant and a first fuel into the melting zone under a level of the molten material in the zone. One or more of the burners is configured to impart heat and turbulence to the molten material, producing a turbulent molten material comprising a plurality of bubbles suspended in the molten material, the bubbles comprising at least some of the combustion products, and optionally other gas species introduced by the burners. The molten material and bubbles are drawn through a bushing fluidly connected to a forehearth to produce a glass fiber comprising a plurality of interior regions substantially devoid of glass.

Amplifiers with wide input range and low input capacitance are provided. In certain embodiments, an amplifier input stage includes a pair of input terminals, a pair of n-type input transistors, a first pair of isolation switches connected between the input terminals and the n-type input transistors, a pair of p-type input transistors, and a second pair of isolation switches connected between the input terminals and the p-type input transistors. The amplifier input stage further includes a control circuit that determines whether to use the n-type input transistors and/or the p-type input transistors for amplification based on a detected common-mode voltage of the input terminals. The control circuit opens the first pair of isolation switches to decouple the input terminals from the n-type input transistors when unused, and opens the second pair of isolation switches to decouple the input terminals from the p-type input transistors when unused.

An amplifying circuit is provided. The amplifying circuit includes a bias circuit receiving an operating voltage from a power supply circuit and generating a first bias voltage, a resistance circuit connected between the bias circuit and a gate node and transferring the first bias voltage to the gate node, a start-up circuit generating a high-level start-up voltage and supplying the start-up voltage to the gate node before the operating voltage is supplied, based on a control signal, and an amplifier started-up by receiving the start-up voltage and then receiving the operating voltage and the first bias voltage to amplify a high frequency signal input through the gate node.