Enhanced operational amplifier trim circuitry and techniques are presented herein. In one implementation, a circuit includes a reference circuit configured to produce a set of reference voltages, and a digital-to-analog conversion (DAC) circuit. The DAC circuit comprises a plurality of transistor pairs, where each pair among the plurality of transistor pairs is configured to provide portions of adjustment currents for an operational amplifier based at least on the set of reference voltages and sizing among transistors of each pair. The circuit also includes drain switching elements coupled to drain terminals of the transistors of each pair and configured to selectively couple one or more of the portions of the adjustment currents to the operational amplifier in accordance with digital trim codes.

Aspects of the present disclosure provide a method for regulating an integration current of a sensing amplifier. The sensing amplifier includes a first input transistor and a second input transistor, wherein a source of the first input transistor and a source of the second input transistor are coupled to a source node. The method includes pulling a current from or sourcing the current to the source node, measuring the integration current, comparing the measured integration current with a reference signal, and adjusting the current pulled from or sourced to the source node based on the comparison.

A signal processor and method. The signal processor includes a signal current path. The signal processor includes a transconductor. The transconductor has an input operable to receive an input voltage of the signal processor. The transconductor also has an output operable to output a current based on the input voltage. The signal processor also includes a processing stage coupled to the output of the transconductor to receive and process the current outputted by the transconductor. The signal processor further includes a current replicator operable to generate a replica current proportional to the current outputted by the transconductor. The signal processor also includes a comparator operable to compare an output of the current replicator with a reference. The signal processor further includes a current limiter operable to limit the current outputted by the transconductor based on the comparison of the output of the current replicator with the reference.

Provided herein are amplifiers, such as buffers, with increased headroom. An amplifier stage includes a follower transistor and current source configured to receive a power supply voltage comprising an alternating current component and a direct current component. The alternating current component of the power supply voltage has substantially the same frequency and magnitude as the input signal received by the follower transistor. In radio frequency (RF) and intermediate frequency (IF) buffer applications, for example, the increased headroom can allow for linear buffering of an input signals with increased amplitude so that the output power one decibel (OP1dB) compression point can be increased.

A balanced differential transimpedance amplifier with a single-ended input operational over a wide variation in the dynamic range of input signals. A threshold circuit is employed to either or a combination of (1) generate a varying decision threshold to ensure a proper slicing over a wide range of input current signal levels; and (2) generate a bias current and voltage applied to an input of a transimpedance stage to cancel out a dependence of the transimpedance stage voltage input on input current signal levels.

A differential amplifier comprises: a long tailed pair transistor configuration comprising a differential pair of transistors and a tail transistor; and a replica circuit configured to vary a feedback current in the replica circuit to match a replica voltage to a reference voltage, wherein varying the feedback current in the replica circuit 4 provides a bias voltage to the tail transistor in the long tailed pair which controls a tail current through the tail transistor to determine a common mode voltage in the long tailed pair.

An operational amplifier comprises: a first amplifier stage 4 comprising a first differential pair of transistors 8, 10 arranged to receive and amplify a differential input signal 18, 20 thereby providing a first differential output signal 22, 24; and a second amplifier stage 6 comprising a second differential pair of transistors 26, 28 arranged to receive and amplify the first differential output signal 22, 24 thereby providing a second differential output signal 38, 40.

A line receiver comprising a switched capacitor circuit and a buffer is described. The buffer may be configured to receive, through the switched capacitor circuit, an analog signal. In response, the buffer may provide an output signal to a load, such as an analog-to-digital converter. The switched capacitor circuit may be controlled by a control circuitry, and may charge at least one capacitive element to a desired reference voltage. The reference voltage may be selected so as to bias the buffer with a desired DC current, and consequently, to provide a desired degree if linearity. The line receiver may further comprise a bias circuit configured to generate the reference voltage needed to bias the buffer with the desired DC current.

An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more power amplifiers for amplifying a signal for transmission through the antenna. Radio-frequency power amplifier circuitry may include an amplifier, an input transformer for coupling radio-frequency input signals to the amplifier, an active inductor load coupled to the input transformer, and a second order intermodulation generation circuit configured to generate and inject a second order intermodulation product into the input transformer. The injected second order intermodulation product can be used to cancel out unwanted third order intermodulation products generated by the amplifier, which reduces intermodulation distortion experienced by the amplifier circuitry.

An amplifier circuit with a differential input and a differential output comprises a first and a second pair of matched transistors having a first threshold voltage and comprising control terminals connected to the differential input. A first and a second pair of triplets of transistors having a second threshold voltage being different from the first threshold voltage is connected to each one of the pairs of matched transistors such that respective current paths are formed with these transistors. The currents are split up to bias current sources and to an output stage such that the current is reused for implementing a class AB operation. Furthermore, a current through bias transistors connected in the current path of the first and the second pair of matched transistors is mirrored to output transistors being arranged in a differential current path of the output stage.