A transmission module includes n oscillator modules and a phase command signal generator. Each of the oscillator modules includes a voltage controlled oscillator and an amplification circuit. The voltage controlled oscillators output transmission high-frequency signals having the same frequency and synchronized among the n oscillator modules by synchronous control based on a common reference signal. The amplification circuits each perform power amplification for the transmission high-frequency signal from a corresponding one of the voltage controlled oscillators and output the resultant signal. Phases of the transmission high-frequency signals synchronized among the n oscillator modules and output from the voltage controlled oscillators are separately controlled according to respective n phase command signals from the phase command signal generator.

A radio-frequency module includes a multilayer substrate, a first semiconductor device, a second semiconductor device, and an anisotropic conductive resin component. The multilayer substrate includes a plurality of stacked layers, and has a first major face and a second major face. The first major face includes a first recess. The first semiconductor device is mounted over a bottom face of the first recess with the anisotropic conductive resin component interposed therebetween. The second semiconductor device is mounted over the first major face so as to overlie the first recess. The first semiconductor device is connected with a metallic via that extends through a portion of the multilayer substrate from the bottom face of the first recess to the second major face.

The application relates to the field of communications technologies, and disclose a signal amplification processing method and apparatus. The method includes setting multiple groups of parameter values for a signal decomposition parameter group, separately performing signal amplification processing based on each group of parameter values, obtaining a power amplification efficiency corresponding to each group of parameter values, obtaining a group of parameter values corresponding to a maximum power amplification efficiency in the power amplification efficiency corresponding to each group of parameter values, and setting the group of parameter values corresponding to the maximum power amplification efficiency as parameter values of the signal decomposition parameter group. Thus, the power amplification efficiency may be improved.

An amplification circuit has a field effect transistor, an input side matching circuit, an output side matching circuit, a capacitor, and a resistor. The input side matching circuit is connected between an input port and the source terminal of the field effect transistor and outputs an input signal that changes with a bias voltage as a center value. The output side matching circuit is connected between an output port and the drain terminal of the field effect transistor. The capacitor is connected between the gate terminal of the field effect transistor and a first reference voltage source. The resistor is connected between the gate terminal of the field effect transistor and the first reference voltage source.

A method and an apparatus for improving signal quality through noise detection in an electronic device are provided. The electronic device may include a power amplifier configured to amplify and output a transmitted signal, a noise detector configured to detect noise in a receiving band by the power amplifier and to output a power level of the detected noise, and a processor configured to acquire the power level of the noise through the noise detector, acquire control information to change the output power of the power amplifier based on the power level of the noise, and control the output power of the power amplifier based on the control information.

An integrated circuit architecture and circuitry is defined by a die structure with a plurality of exposed conductive pads arranged in a grid of rows and columns. The die structure has a first operating frequency region with a first transmit and receive chain, and a second operating frequency region with a second transmit chain and a second receive chain. There is a shared region of the die structure defined by an overlapping segment of the first operating frequency region and the second operating frequency region with a shared power supply input conductive pad connected to the first transmit chain, the second transmit chain, the first receive chain, and the second receive chain, and a shared power detection output conductive pad connected to the first transmit chain and the second transmit chain.

Provided is a Radio Frequency (RF) communication apparatus and a method for detecting power. The RF communication apparatus includes a receiver that receives a segment value indicating one of multiple transmission output power ranges, a power detector that detects a strength of an RF transmission signal in an output power range corresponding to the segment value, and a transmitter that transmits the strength of the detected RF transmission signal. The power detector includes a feedback unit that receives the fed-back RF transmission signal, an RF core unit that generates a Root Mean Square (RMS) of the RF transmission signal, and a converter that converts a current signal corresponding to the RMS of the RF transmission signal into a voltage signal, and converts the converted voltage signal from a differential signal to a single signal.

Methods and apparatus for providing adaptive biasing to power amplifiers. Adaptive bias circuits are configured to provide sharp turn on and/or current clamping to improve the efficiency of a power amplifier over a wide input signal bandwidth. Sharp turn on may be achieved using a subtraction technique to subtract outputs from multiple detectors. Clamping may be achieved using MOSFET device characteristics to pull the device from the triode region into the saturation, subtraction techniques to subtract the outputs from multiple detectors, and/or by using circuit devices, such as diodes.

A reconfigurable power detector is described. The reconfigurable power detector includes a first power detector circuit. The first power detector circuit includes a pair of coupled first-type transistors to switch a first-type positive output and a first-type negative output. The reconfigurable power detector includes a second power detector circuit. The second power detector circuit includes a pair of coupled second-type transistors to switch a second-type positive output and a second-type negative output. The reconfigurable power detector includes a switch matrix. The switch matrix includes switches to select the second-type positive output and the second-type negative output in a first configuration, the first-type positive output and the first-type negative output in a second configuration, and the first-type positive output and the second-type positive output in a third configuration. The reconfigurable power detector also includes a configuration block to program the switches to select an output configuration at a detector output.

In certain aspects, a method is provided for measuring power using a resistive element coupled between a power amplifier and an antenna. The method includes squaring a voltage from a first terminal of the resistive element to obtain a first signal, squaring a voltage from a second terminal of the resistive element to obtain a second signal, and generating a measurement signal based on a difference between the first signal and the second signal. In some implementations, the resistive element is implemented with a power switch.