An amplifier including a first routing circuit, an input stage circuit, an output stage circuit, a second routing circuit, and a bias voltage generating circuit is provided. The bias voltage generating circuit generates a first bias voltage and a second bias voltage for respectively supplying a first tail current source and a second tail current source of the input stage circuit. During a first period, the first bias voltage is related to the voltage at a first input terminal of the amplifier, and the second bias voltage is related to the voltage at a second input terminal of the amplifier. During a second period, the first bias voltage is related to the voltage at the second input terminal of the amplifier, and the second bias voltage is related to the voltage at the first input terminal of the amplifier.

The present disclosure relates to an offset elimination operation of an internal operational amplifier of a data driving circuit and relates to a technique that applies different offset elimination methods for each position of an operational amplifier.

An adaptive continuous-time linear equalizer (CTLE) includes a CTLE cell including input terminals and output terminals, a low-pass filter configured to respectively output low-band differential signals obtained by respectively low-pass filtering differential output signals, and an error amplifier configured to amplify a difference between the low-band differential signals and output the difference as a control voltage. The CTLE cell includes first and second transistors each including an input terminal and an output terminal and an offset compensator configured to adjust a potential difference between a supply voltage source and the output terminal according to the control voltage.

The present disclosure relates to an offset elimination operation of an internal operational amplifier of a data driving circuit and relates to a technique that applies different offset elimination methods for each position of an operational amplifier.

The present disclosure relates to an offset elimination operation of an internal operational amplifier of a data driving circuit and relates to a technique that applies different offset elimination methods for each position of an operational amplifier.