A sub-40 kilohertz low-frequency cutoff is provided for via a transimpedance amplifier comprising differential inputs and differential outputs; coupling capacitors comprising input terminals configured to receive electrical signals, and output terminals coupled to the differential inputs; and feedback paths coupled to the differential outputs and operable to level shift voltage levels at the input terminals. In some embodiments, the feedback paths comprise source follower transistors wherein the differential outputs are coupled to gate terminals of the source follower transistors or the feedback paths further comprise feedback resistors. In some embodiments, a bias resistor is coupled between the differential inputs.

A system for a differential trans-impedance amplifier circuit comprising: an amplifier having a pair of input nodes and configured to generate an amplified replica of a differential voltage on said pair of input nodes; a photodiode; a pair of capacitors coupling said photodiode to said pair of input nodes; at least one resistance coupled between said pair of input nodes of said amplifier; and a bias network comprising two photodiode biasing resistances each photodiode biasing resistance coupled in series between said photodiode and a respective DC voltage. A feedback loop for the amplifier may include source followers that are operable to level shift voltages prior to coupling capacitors that couple said photodiode to said amplifier to ensure stable bias conditions for said amplifier. The source followers may include CMOS transistors. The amplifier may be integrated in a complementary metal-oxide semiconductor (CMOS) chip, which may include a CMOS photonics chip.

A driver for a transmitter includes an output stage comprising a first equalizer and a second equalizer, coupled to an output circuit of the transmitter, being operable for receiving a plurality of differential input data streams to generate an equalized differential output signals, wherein the first equalizer and the second equalizer being coupled and reconfigured to form a plurality of parallel driver segments, each driver segment having a calibration circuit, at least one of the calibration circuits been enabled to control the impedance of the output circuit, the plurality of differential input data streams are processed by the first and the second equalizer to shape the plurality of differential input data streams for compensating the channel loss.

A driver for a transmitter includes an output stage comprising a first equalizer and a second equalizer, coupled to an output circuit of the transmitter, being operable for receiving a plurality of differential input data streams to generate an equalized differential output signals, wherein the first equalizer and the second equalizer being coupled and reconfigured to form a plurality of parallel driver segments, each driver segment having a calibration circuit, at least one of the calibration circuits been enabled to control the impedance of the output circuit, the plurality of differential input data streams are processed by the first and the second equalizer to shape the plurality of differential input data streams for compensating the channel loss.

To accurately detect the presence or absence of a signal. A signal detector includes an input-signal amplifying circuit, a reference-signal amplifying circuit, and a comparator. In the signal detector, the input-signal amplifying circuit amplifies an input signal with a predetermined gain. The reference-signal amplifying circuit amplifies a reference signal at a constant signal-level with a gain that substantially matches the predetermined gain. The comparator compares a signal level of the amplified input signal with a signal level of the amplified reference signal, and outputs the comparison result as a detection signal.

A system for a differential trans-impedance amplifier circuit comprising: an amplifier having a pair of input nodes and configured to generate an amplified replica of a differential voltage on said pair of input nodes; a photodiode; a pair of capacitors coupling said photodiode to said pair of input nodes; at least one resistance coupled between said pair of input nodes of said amplifier; and a bias network comprising two photodiode biasing resistances each photodiode biasing resistance coupled in series between said photodiode and a respective DC voltage. A feedback loop for the amplifier may include source followers that are operable to level shift voltages prior to coupling capacitors that couple said photodiode to said amplifier to ensure stable bias conditions for said amplifier. The source followers may include CMOS transistors. The amplifier may be integrated in a complementary metal-oxide semiconductor (CMOS) chip, which may include a CMOS photonics chip.

A system for a differential trans-impedance amplifier circuit comprising: an amplifier having a pair of input nodes and configured to generate an amplified replica of a differential voltage on said pair of input nodes; a photodiode; a pair of DC-blocking capacitors coupling said photodiode to said pair of input nodes; at least one resistance coupled between said pair of input nodes of said amplifier; and a bias network comprising two identical photodiode biasing resistances each photodiode biasing resistance coupled in series between said photodiode and a respective DC voltage. A feedback loop for the amplifier may include source followers that are operable to level shift voltages prior to coupling capacitors that couple said photodiode to said amplifier to ensure stable bias conditions for said amplifier. The source followers may include CMOS transistors. The amplifier may be integrated in a complementary metal-oxide semiconductor (CMOS) chip, which may include a CMOS photonics chip.

A system for a feedback transimpedance amplifier with sub-40 khz low-frequency cutoff is disclosed and may include amplifying electrical signals received via coupling capacitors utilizing a transimpedance amplifier (TIA) having feedback paths comprising source followers and feedback resistors. The feedback paths may be coupled prior to the coupling capacitors at inputs of the TIA. Voltages may be level shifted prior to the coupling capacitors to ensure stable bias conditions for the TIA. The TIA may be integrated in a CMOS chip and the source followers may comprise CMOS transistors. The TIA may receive current-mode logic or voltage signals. The electrical signals may be received from a photodetector, which may comprise a silicon germanium photodiode and may be differentially coupled to the TIA. The chip may comprise a CMOS photonics chip where optical signals for the photodetector in the CMOS photonics chip may be received via one or more optical fibers.

A radio frequency (RF) power amplifier circuit includes an input and an output. A power amplifier transistor has a first terminal connected to the input, a second terminal connected to the output, and a third terminal defined by a degeneration inductance. A first capacitor is connected to the third terminal of the power amplifier transistor, along with a negative capacitance circuit connected in series with the first capacitor. The negative capacitance and the first capacitor define a series resonance at a predefined operating frequency band, which shunts the degeneration inductance of the third terminal.

A radio frequency (RF) power amplifier circuit includes an input and an output. A power amplifier transistor has a first terminal connected to the input, a second terminal connected to the output, and a third terminal defined by a degeneration inductance. A first capacitor is connected to the third terminal of the power amplifier transistor, along with a negative capacitance circuit connected in series with the first capacitor. The negative capacitance and the first capacitor define a series resonance at a predefined operating frequency band, which shunts the degeneration inductance of the third terminal.