A programmable a fully-differential programmable gain amplifier for reducing distortion, switching transients and interference, and improving bandwidth. In one embodiment, the amplifier includes a programmable gain module, an amplifier coupled to the current mode outputs and a data latch circuit of the programmable gain module, the amplifier configured to apply common mode voltage to the data latch circuit, and a current-to-voltage converter. In one embodiment, the fully-differential programmable gain amplifier controls distortion and switching interference during amplification by sensing common mode signals to produce an error signal, and applying the resulting error signal to the programmable gain module for multiplying digital to analog conversion. Components of the fully-differential programmable gain amplifier provide compensation of distortion caused by nonlinearity of device switches and switch resistance, and can include a floating supply, galvanic isolation of control signals and a common mode voltage controller.

A low noise amplifier for an RF sampling analog front end. The amplifier includes digital step attenuation for applying a selected attenuation to signals received at an input node, and a gain stage coupled to amplify the attenuated signal from the digital step attenuation circuit. In a differential amplifier implementation, a first input capacitor is coupled between a positive side input node and an output of the negative side digital attenuation circuit, and a second input capacitor is coupled between a negative side input node and an output of the positive side digital step attenuation circuit. In some embodiments, variable feedback circuits are coupled between each input node and an output of the corresponding gain stage, to selectively apply active termination at the input at high gain settings of the amplifier. Variable input and output resistors, and programmable noise filtering at the output, are provided in some embodiments.

An amplifier circuit can include an amplifier and a resistor network coupled to the amplifier. The resistor network can include a range resistor coupled in parallel to a resistor string, and one or more switches coupled to the resistor string. The resistor network can be used to calibrate gain and common mode rejection ratio (CMRR) of the amplifier circuit.

Apparatuses, systems, and methods are disclosed for offset trimming for differential amplifiers. An apparatus includes a differential amplifier. A differential amplifier includes a non-inverting input, an inverting input, and an output coupled to the inverting input via a voltage divider. A first variable current source is coupled to a non-inverting input, so that increasing a current from the first variable current source increases a voltage at the non-inverting input. A second variable current source is coupled to an inverting input, and to an output via a voltage divider, so that increasing a current from the second variable current source decreases a voltage at the output.

Apparatuses, systems, and methods are disclosed for offset trimming for differential amplifiers. An apparatus includes a differential amplifier. A differential amplifier includes a non-inverting input, an inverting input, and an output coupled to the inverting input via a voltage divider. A first variable current source is coupled to a non-inverting input, so that increasing a current from the first variable current source increases a voltage at the non-inverting input. A second variable current source is coupled to an inverting input, and to an output via a voltage divider, so that increasing a current from the second variable current source decreases a voltage at the output.

Various aspects of this disclosure describe reducing distortion of a power amplifier by coupling a common mode signal, such as determined from a voltage supply signal of the power amplifier or output of the power amplifier, to an input of the power amplifier. A resistive digital-to-analog converter (DAC) can be coupled to the power amplifier, and a common mode signal is modulated onto differential reference voltages of the DAC, causing the common mode signal to exist at both the input and output of the power amplifier at approximately the same time. Consequently, current flowing at differential inputs of the power amplifier due to the common mode component drops to zero, causing distortions due to common mode to differential mode conversion to be reduced.

A compensation circuit for compensating an input voltage offset of an error amplifier has a level shifter, a first trimming circuit, a second trimming circuit, and a compensation current sinking device. The level shifter shifts levels of a feedback voltage and a predetermined reference voltage and outputs a level shifted feedback voltage and a level shifted reference voltage. The first trimming circuit adjusts the level shifted reference voltage by trimming a first resistance thereof according to a trimming code, wherein the trimming code has the ratio relation of the input voltage offset and a resistance to be trimmed. The second trimming circuit adjusts the level shifted feedback voltage by trimming a second resistance thereof according to a trimming code. The compensation current sinking device sinks currents passing through the first and second trimming circuits.

The inventive concepts relate to variable gain amplifiers. The variable gain amplifier including an amplifier, a first fixed resistor and a first variable resistor, a second fixed resistor and a second variable resistor, a third fixed resistor and a third variable resistor, a fourth fixed resistor and a fourth variable resistor, a first output terminal and a second output terminal, and a decoder may be provided. The decoder is configured to receive first control bits, generate second control bits from the first control bits, generate third and fourth control bits from the first or second control bits, respectively, transmit the first control bits and the third control bits to the third and fourth variable resistors to adjust resistance values, and transmit the second and fourth control bits to first and second variable resistors to adjust resistance values.

An amplifier circuit can include an amplifier and a resistor network coupled to the amplifier. The resistor network can include a range resistor coupled in parallel to a resistor string, and one or more switches coupled to the resistor string. The resistor network can be used to calibrate gain and common mode rejection ratio (CMRR) of the amplifier circuit.

The inventive concepts relate to variable gain amplifiers. The variable gain amplifier including an amplifier, a first fixed resistor and a first variable resistor, a second fixed resistor and a second variable resistor, a third fixed resistor and a third variable resistor, a fourth fixed resistor and a fourth variable resistor, a first output terminal and a second output terminal, and a decoder may be provided. The decoder is configured to receive first control bits, generate second control bits from the first control bits, generate third and fourth control bits from the first or second control bits, respectively, transmit the first control bits and the third control bits to the third and fourth variable resistors to adjust resistance values, and transmit the second and fourth control bits to first and second variable resistors to adjust resistance values.