Method and apparatus for managing data in a memory, such as a flash memory. In accordance with some embodiments, a solid-state non-volatile memory (NVM) has a total user data storage capacity and an overprovisioning (OP) level. A control circuit writes parity data sets to the NVM each having a plurality of code words and an outer code. The code words include inner codes at an inner code rate to detect and correct read errors in a user data payload. The outer code includes parity data at an outer code rate to detect and correct read errors in the code words. A code adjustment circuit increases the inner code rate to compensate for a measured parameter associated with the NVM, and decreases the outer code rate to maintain the data capacity and OP levels above selected thresholds.

A method for performing polar coding is disclosed in the application. A data block is segmented into a plurality of first blocks. Difference in bit length between any two first blocks is not more than one bit. For each first block, one or more consecutive padding bits is added to obtain a second block of a bit length K if the bit length of the first block is less than K, so as to obtain a plurality of second blocks corresponding to the first blocks. N-K consecutive bits are added to each of the second blocks to obtain a plurality of third blocks. Polar encoding is performed on the third blocks.

A method for performing polar coding is disclosed in the application. A data block is segmented into a plurality of first blocks. Difference in bit length between any two first blocks is not more than one bit. For each first block, one or more consecutive padding bits is added to obtain a second block of a bit length K if the bit length of the first block is less than K, so as to obtain a plurality of second blocks corresponding to the first blocks. NK consecutive bits are added to each of the second blocks to obtain a plurality of third blocks. Polar encoding is performed on the third blocks.

An apparatus for polar coding includes an encoder circuit that implements a transformation c=u.sub.1.sup.N-sB.sub.N-s{tilde over (M)}.sub.n, where u.sub.1.sup.N-s, B.sub.N-s, {tilde over (M)}.sub.n, and C are defined over a Galois field GF(2.sup.k), k>1, N=2.sup.k, s<N, u.sub.1.sup.N-s=(u.sub.1, . . . , u.sub.N-s) is an input vector of N-s symbols over GF(2.sup.k), B.sub.N-s is a permutation matrix, {tilde over (M)}.sub.n=((Ns) rows of M.sub.n=), the matrix M.sub.1 is a pre-defined matrix of size qq, 2<q, N=q.sup.n and n1, and C is a codeword vector of N-s symbols. A decoding complexity of C is proportional to a number of symbols in C. The apparatus further includes a transmitter circuit that transmits codeword C over a transmission channel.

A computer-based real-time streaming system under packet erasures wherein created messages can be decoded within a fixed delay form their creation is presented. Various code construction methods and corresponding hardware implementation for different cases of erasure link models are also presented.

A computer-based real-time streaming system under packet erasures wherein created messages can be decoded within a fixed delay form their creation is presented. Various code construction methods and corresponding hardware implementation for different cases of erasure link models are also presented.

A method for decoding a headerized sub data set (SDS) according to one embodiment includes decoding a header from a headerized SDS to obtain a SDS. C1 and C2 decoding are performed on the SDS in a number of iterations based on a number of interleaves in each row of the SDS. A number of columns of the SDS are overwritten with successfully decoded C2 codewords. A number of rows of the SDS are overwritten with successfully decoded C1 codewords. A number of C1 and/or C2 codewords of the SDS are erased. Remaining rows and/or columns of the SDS are maintained as uncorrected. The SDS is output when all rows of the SDS include only C1 codewords and all columns of the SDS include only C2 codewords.