A transmitting system, a receiving system, and a method of processing broadcast signals are disclosed. The method for processing a broadcast signal in a broadcast receiver comprises receiving a DTV signal including a data group, the data group including mobile service data, segmented known data sequences, long known data sequences and transmission parameter data, compensating carrier frequency offset of the DTV signal and channel-equalizing the carrier frequency offset compensated DTV signal using at least one of the long known data sequences and segmented known data sequences in the data group of the DTV signal, wherein the channel-equalizing includes performing a Error Correction (FEC) decoding on data located between the segmented known data sequences, and estimating Channel Impulse Response (CIR) using the FEC decoded data as known data.

Methods and apparatus for transmitting and receiving broadcast signals are provided. The method for transmitting a broadcast signal includes encoding mobile data for forward error correction (FEC), encoding signaling data, forming data groups including the encoded mobile data and the encoded signaling data and transmitting a signal frame that includes the data groups.

The present invention provides a design framework that is used to develop new types of constrained turbo block convolutional (CTBC) codes that have higher performance than was previously attainable. The design framework is applied to design both random and deterministic constrained interleavers. Vectorizable deterministic constrained interleavers are developed and used to design parallel architectures for real time SISO decoding of CTBC codes. A new signal mapping technique called constrained interleaved coded modulation (CICM) is also developed. CICM is then used to develop rate matching, spatial modulation, and MIMO modulation subsystems to be used with CTBC codes and other types of codes. By way of example, embodiments are primarily provided for improved 5G LTE and optical transport network (OTN) communication systems.

A coding circuit includes an encoder circuit generating parity by applying input data to a parity generating matrix and generating an input codeword by concatenating the input data and the parity; and a decoder circuit detecting and correcting an error included in an output codeword based on a first syndrome, a second syndrome, and a third syndrome for identifying an error boundary. The first, second, and third syndromes are generated by applying the output codeword to the parity generating matrix.

Series turbo-decoder, series turbo-decoding method and computer program product, the series turbo-decoder comprises an input configured to receive a word to be decoded comprising informative data or payload data, internal and external redundancy data, an internal decoder (DCI) and an external decoder (DCE). The internal decoder and the external decoder receive the word simultaneously. The internal decoder is configured to perform part of the decoding of the word based on the payload data and on the internal and external redundancy data. The external decoder is configured to perform another part of the decoding of the word based on the payload data and on the external redundancy data without awaiting the availability of information extrinsic to the internal decoder.