An architecture for a multiplier-accumulator (MAC) uses a common Unit Element (UE) for each aspect of operation, the MAC formed as a plurality of MAC UEs, a plurality of Bias UEs, and a plurality of Analog to Digital Conversion (ADC) UEs which collectively perform a scalable MAC operation and generate a binary result. Each MAC UE, BIAS UE and ADC UE comprises groups of NAND gates with complementary outputs arranged in NAND-groups, each NAND gate coupled to a differential charge transfer bus through a binary weighted charge transfer capacitor to form an analog multiplication product as a charge applied to the differential charge transfer bus. The analog charge transfer bus is coupled to groups of ADC UEs with an ADC controller which enables and disables the ADC UEs using successive approximation to determine the accumulated multiplication result.

Video coding and decoding methods are described. In example method includes performing a conversion between a current video block of a video and a bitstream representation of the current video block by determining a first intra coding mode to be stored which is associated with the current video block using a differential coding mode, where the first intra coding mode associated with the current video block is determined according to a second prediction mode used by the differential coding mode, and where, in the differential coding mode, a difference between a quantized residual of an intra prediction of the current video block and a prediction of the quantized residual is represented in the bitstream representation for the current video block using a differential pulse coding modulation (DPCM) representation.

An optical network includes a transmitting portion configured to (i) encode an input digitized sequence of data samples into a quantized sequence of data samples having a first number of digits per sample, (ii) map the quantized sequence of data samples into a compressed sequence of data samples having a second number of digits per sample, the second number being lower than the first number, and (iii) modulate the compressed sequence of data samples and transmit the modulated sequence over a digital optical link. The optical network further includes a receiving portion configured to (i) receive and demodulate the modulated sequence from the digital optical link, (ii) map the demodulated sequence from the second number of digits per sample into a decompressed sequence having the first number of digits per sample, and (iii) decode the decompressed sequence.

An optical network includes a transmitting portion configured to (i) encode an input digitized sequence of data samples into a quantized sequence of data samples having a first number of digits per sample, (ii) map the quantized sequence of data samples into a compressed sequence of data samples having a second number of digits per sample, the second number being lower than the first number, and (iii) modulate the compressed sequence of data samples and transmit the modulated sequence over a digital optical link. The optical network further includes a receiving portion configured to (i) receive and demodulate the modulated sequence from the digital optical link, (ii) map the demodulated sequence from the second number of digits per sample into a decompressed sequence having the first number of digits per sample, and (iii) decode the decompressed sequence.

Video coding and decoding methods are described. In example method includes performing a conversion between a current video block of a video and a bitstream representation of the current video block by determining a first intra coding mode to be stored which is associated with the current video block using a differential coding mode, where the first intra coding mode associated with the current video block is determined according to a second prediction mode used by the differential coding mode, and where, in the differential coding mode, a difference between a quantized residual of an intra prediction of the current video block and a prediction of the quantized residual is represented in the bitstream representation for the current video block using a differential pulse coding modulation (DPCM) representation.

Video coding and decoding methods are described. In example method includes performing a conversion between a current video block of a video and a bitstream representation of the current video block by determining a first intra coding mode to be stored which is associated with the current video block using a differential coding mode, where the first intra coding mode associated with the current video block is determined according to a second prediction mode used by the differential coding mode, and where, in the differential coding mode, a difference between a quantized residual of an intra prediction of the current video block and a prediction of the quantized residual is represented in the bitstream representation for the current video block using a differential pulse coding modulation (DPCM) representation.

A differential multiplier-accumulator accepts A and B digital inputs and generates a dot product P by applying the bits of the A input and the bits of the B inputs to respective positive and negative unit elements comprised of groups of AND gates coupled to charge transfer lines through a capacitor Cu. Each positive and negative unit element receives one bit of the B input applied to all of the AND gates of the unit element, and each positive and negative unit element having the bits of A applied to each associated AND gate input of each unit element. The AND gates are coupled to charge transfer lines through a capacitor Cu, and the charge transfer lines couple to binary weighted charge summing capacitors and to an analog to digital converter to generate a digital output product. The charge transfer lines may span multiple unit elements.

A differential multiplier-accumulator accepts A and B digital inputs and generates a dot product P by applying the bits of the A input and the bits of the B inputs to respective positive and negative unit elements comprised of groups of AND gates coupled to charge transfer lines through a capacitor Cu. Each positive and negative unit element receives one bit of the B input applied to all of the AND gates of the unit element, and each positive and negative unit element having the bits of A applied to each associated AND gate input of each unit element. The AND gates are coupled to charge transfer lines through a capacitor Cu, and the charge transfer lines couple to binary weighted charge summing capacitors and to an analog to digital converter to generate a digital output product. The charge transfer lines may span multiple unit elements.

A vibration rectification error correction device includes a first filter that operates in synchronization with the measured signal, and a second filter that operates in synchronization with the reference signal, in which the first filter generates a third signal based on a first signal having a first group delay amount and a second signal having a second group delay amount, the second filter receives a signal based on the third signal and outputs a fourth signal, and a first vibration rectification error and a second vibration rectification error have different polarities.

An optical network includes a transmitting portion configured to (i) encode an input digitized sequence of data samples into a quantized sequence of data samples having a first number of digits per sample, (ii) map the quantized sequence of data samples into a compressed sequence of data samples having a second number of digits per sample, the second number being lower than the first number, and (iii) modulate the compressed sequence of data samples and transmit the modulated sequence over a digital optical link. The optical network further includes a receiving portion configured to (i) receive and demodulate the modulated sequence from the digital optical link, (ii) map the demodulated sequence from the second number of digits per sample into a decompressed sequence having the first number of digits per sample, and (iii) decode the decompressed sequence.