H03M5/04

METHODS AND SYSTEMS FOR HIGH BANDWIDTH COMMUNICATIONS INTERFACE

A pair of ground planes arranged in parallel, a dielectric medium disposed in between the pair of ground planes, and a set of at least four signal conductors disposed in the dielectric medium, the set of at least four signal conductors having (i) a first pair of signal conductors arranged proximate to a first ground plane of the pair of ground planes and (ii) a second pair of signal conductors arranged proximate to a second ground plane of the pair of ground planes, each signal conductor of the set of at least four signal conductors configured to carry a respective signal corresponding to a symbol of a codeword of a vector signaling code.

ENERGY EFFICIENT ADAPTIVE DATA ENCODING METHOD AND CIRCUIT
20210320672 · 2021-10-14 ·

Various energy efficient data encoding schemes and computing devices are disclosed. In one aspect, a method of transmitting data from a transmitter to a receiver connected by plural wires is provided. The method includes sending from the transmitter on at least one but not all of the wires a first wave form that has first and second signal transitions. The receiver receives the first waveform and measures a first duration between the first and second signal transitions using a locally generated clock signal not received from the transmitter. The first duration is indicative of a first particular data value.

ENERGY EFFICIENT ADAPTIVE DATA ENCODING METHOD AND CIRCUIT
20210320672 · 2021-10-14 ·

Various energy efficient data encoding schemes and computing devices are disclosed. In one aspect, a method of transmitting data from a transmitter to a receiver connected by plural wires is provided. The method includes sending from the transmitter on at least one but not all of the wires a first wave form that has first and second signal transitions. The receiver receives the first waveform and measures a first duration between the first and second signal transitions using a locally generated clock signal not received from the transmitter. The first duration is indicative of a first particular data value.

Energy efficient adaptive data encoding method and circuit

Various energy efficient data encoding schemes and computing devices are disclosed. In one aspect, a method of transmitting data from a transmitter to a receiver connected by plural wires is provided. The method includes sending from the transmitter on at least one but not all of the wires a first wave form that has first and second signal transitions. The receiver receives the first waveform and measures a first duration between the first and second signal transitions using a locally generated clock signal not received from the transmitter. The first duration is indicative of a first particular data value.

Energy efficient adaptive data encoding method and circuit

Various energy efficient data encoding schemes and computing devices are disclosed. In one aspect, a method of transmitting data from a transmitter to a receiver connected by plural wires is provided. The method includes sending from the transmitter on at least one but not all of the wires a first wave form that has first and second signal transitions. The receiver receives the first waveform and measures a first duration between the first and second signal transitions using a locally generated clock signal not received from the transmitter. The first duration is indicative of a first particular data value.

ENERGY EFFICIENT ADAPTIVE DATA ENCODING METHOD AND CIRCUIT
20200186166 · 2020-06-11 ·

Various energy efficient data encoding schemes and computing devices are disclosed. In one aspect, a method of transmitting data from a transmitter to a receiver connected by plural wires is provided. The method includes sending from the transmitter on at least one but not all of the wires a first wave form that has first and second signal transitions. The receiver receives the first waveform and measures a first duration between the first and second signal transitions using a locally generated clock signal not received from the transmitter. The first duration is indicative of a first particular data value.

ENERGY EFFICIENT ADAPTIVE DATA ENCODING METHOD AND CIRCUIT
20200186166 · 2020-06-11 ·

Various energy efficient data encoding schemes and computing devices are disclosed. In one aspect, a method of transmitting data from a transmitter to a receiver connected by plural wires is provided. The method includes sending from the transmitter on at least one but not all of the wires a first wave form that has first and second signal transitions. The receiver receives the first waveform and measures a first duration between the first and second signal transitions using a locally generated clock signal not received from the transmitter. The first duration is indicative of a first particular data value.

Methods and apparatus for providing a serializer and deserializer (serdes) block facilitating high-speed data transmissions for a field-programmable gate array (FPGA)

A method for providing a high-speed data communication between a host and field-programmable gate array (FPGA) is disclosed. The method, in one embodiment, is capable of identifying a data rate on a bus containing a P-channel and an N-channel operable to transmit signals in accordance with a high-speed Universal Serial Bus (USB) protocol. Upon sampling, by a first input deserializer, first two samples of data signals carried by the P-channel in accordance with a first clock signals clocking twice as fast as the data rate of the P-channel, a second input deserializer is used to sample the second two samples of data signals transmitted by the N-channel in accordance with a second clock signal running twice as fast as the data rate of the N-channel with a ninety (90) degree phase shift. The method subsequently forwards the data signals to one or more configurable logic blocks (LBs) in FPGA.

Methods and apparatus for providing a serializer and deserializer (serdes) block facilitating high-speed data transmissions for a field-programmable gate array (FPGA)

A method for providing a high-speed data communication between a host and field-programmable gate array (FPGA) is disclosed. The method, in one embodiment, is capable of identifying a data rate on a bus containing a P-channel and an N-channel operable to transmit signals in accordance with a high-speed Universal Serial Bus (USB) protocol. Upon sampling, by a first input deserializer, first two samples of data signals carried by the P-channel in accordance with a first clock signals clocking twice as fast as the data rate of the P-channel, a second input deserializer is used to sample the second two samples of data signals transmitted by the N-channel in accordance with a second clock signal running twice as fast as the data rate of the N-channel with a ninety (90) degree phase shift. The method subsequently forwards the data signals to one or more configurable logic blocks (LBs) in FPGA.

Wired-data bus transmission using signal transition coding
10565156 · 2020-02-18 · ·

Embodiments are directed to apparatuses and methods involving communication between a first circuit and a second circuit over a wired-data bus. An example apparatus includes an integrated circuit (IC) chip within one of the first and second circuits and a logic circuit. The IC has a first data-communication port and a second data-communication for connection to respective first and second conductors of the wired-data bus. The logic circuit communicates a code multi-bit word out of a set of code multi-bit words over the wired-data bus by using signal transitions communicated on the first and second conductors. The code multi-bit word conveys clocked data bits indicated by the signal transitions, and information unique relative to other ones of the set of code multi-bit words by a known sequential pattern of the signal transitions defined relative to timing associated with the clocked data bits.