Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

Test entity for verifying user equipment (UE) device layer 2 sustained downlink maximum data rate decoding performance may send a non-access stratum message to the UE device that requests activation of a downlink-only test mode, sending a first Packet Data Convergence Protocol (PDCP) status request to the UE device, send downlink PDCP packets to the UE device during a measurement interval, receive a physical layer (PHY) hybrid acknowledge request (HARQ) acknowledgement (ACK) or non-acknowledgement (NACK) from the UE device and determine expected missed layer 1 packets based on the received PHY HARQ ACK/NACK, send a second PDCP status request to the UE device after the measurement interval, receive a PDCP status report from the UE device, and determine missed layer 2 packets from a First Missing Count (FMC) value or bitmap included in the received PDCP status report.

Test entity for verifying user equipment (UE) device layer 2 sustained downlink maximum data rate decoding performance may send a non-access stratum message to the UE device that requests activation of a downlink-only test mode, sending a first Packet Data Convergence Protocol (PDCP) status request to the UE device, send downlink PDCP packets to the UE device during a measurement interval, receive a physical layer (PHY) hybrid acknowledge request (HARQ) acknowledgement (ACK) or non-acknowledgement (NACK) from the UE device and determine expected missed layer 1 packets based on the received PHY HARQ ACK/NACK, send a second PDCP status request to the UE device after the measurement interval, receive a PDCP status report from the UE device, and determine missed layer 2 packets from a First Missing Count (FMC) value or bitmap included in the received PDCP status report.

Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments allows feedback timing to be adjusted independent of the sample timing to measure the effects of some forms of phase misalignment and jitter.

Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

The present invention is directed to data communication systems and techniques thereof. More specifically, embodiments of the present invention provide a retimer module that includes plurality of communication lanes for interfacing with a host system and a line system. The retimer module includes a link monitor and cross point sections. The retimer also includes a management interface module. There are other embodiments as well.

The present invention is directed to data communication systems and techniques thereof. More specifically, embodiments of the present invention provide a retimer module that includes plurality of communication lanes for interfacing with a host system and a line system. The retimer module includes a link monitor and cross point sections. The retimer also includes a management interface module. There are other embodiments as well.

A method for testing a vehicle-to-X communication module by means of a diagnostic device as well as an associated vehicle-to-X communication module and an associated diagnostic device. During a test mode messages are exchanged between the vehicle-to-X communication module and the diagnostic device, and evaluated in order to detect errors.