A single channel receiver includes an input terminal that receives an analog input signal, a mixer that down-mixes the analog input signal by use of a phase- and/or frequency-corrected oscillator frequency signal and shifts complex-valued information contained in the analog input signal to the real part (or alternatively to the imaginary part) to obtain an intermediate real-valued analog signal, an analog-to-digital-converter that converts the intermediate analog signal into an intermediate digital signal, a demodulator that demodulates the intermediate digital signal into a digital output signal, a phase tracking loop that detects zero-crossings in the intermediate digital signal to obtain phase error information representing a phase error in the intermediate digital signal, and an oscillator that generates the phase- and/or frequency-corrected oscillator frequency signal by compensating the phase and/or frequency error in the intermediate digital signal by correcting the phase of the oscillator frequency signal with the phase error information.

A receiver comprising: a processing module configured to: receive a first portion of a packet of received signalling from a first antenna; receive a carrier estimate signal; adjust the first portion based on the carrier estimate signal and correlate the signal with an expected code sequence to provide a first correlated signal; a tracking module configured to: receive the first correlated signal and update the carrier estimate signal, wherein the processing module is further configured to: receive a second portion of the packet from a second antenna; adjust the second portion based on the carrier estimate signal and correlate the signal to provide a second correlated signal, and wherein the receive path further comprises a phase calculation module configured to: receive the first and second correlated signals and determine a respective first and second carrier phase and an angle of arrival of the received signalling.

Techniques are described for accurate tracking of a radiofrequency (RF) carrier for amplitude-modulated signals in unstable reference clock environments. For example, some embodiments operate in context of clock circuits in devices configured for near-field communication (NFC) card emulation (CE) mode. The clock circuits seek to generate an internal clocking signal by tracking a clock reference, such as an RF carrier. In some cases, the clock reference can unpredictably become unreliable for periods of time, during which continued tracking of the unreliable clock reference can yield appreciable frequency and phase errors in the generated internal clocking signal. Embodiments implement phase delta detection with time limiting to limit the magnitude of such errors in the internal clocking signal introduced while tracking an unreliable clock reference. For example, embodiments force gating of phase tracking signals to limit their duration, thereby limiting impacts of those phase tracking signals on the clock circuit output.

A transceiver includes a receive circuit configured to receive an incoming signal and recover a reference signal at a reference frequency from the incoming signal. The incoming signal is a wireless packet. A first oscillator generates a signal at a set of predetermined frequencies. A first phase lock loop (PLL) interfaced with the first oscillator. The first PLL is configured to adjust a first oscillator frequency of the first oscillator based on an incoming frequency of the incoming signal using the reference frequency. A transmit circuit includes a second oscillator configured to generate a carrier signal at a predetermined frequency and a modulator configured to modulate data over the carrier signal at the predetermined frequency. The transmit circuit includes a second PLL interfaced with the second oscillator that sets the second oscillator to generate the carrier signal at the predetermined frequency using the reference signal. The transmit circuit transmits the modulated carrier signal.

Provided herein are apparatus and methods for wideband receivers. In certain configurations, a radio frequency (RF) communication system includes two or more receiver slices that operate in parallel with one another to process an RF input signal. The receiver slices generate digital signals by processing different sub-bands of the RF input signal. For example, the RF communication system can include a first receiver slice that processes a first sub-band of the RF input signal and that generates a first digital signal representing the first sub-band, and a second receiver slice that processes a second sub-band of the RF input signal and generates a second digital signal representing the second sub-band. The RF communication system further includes a clock generation circuit that generates one or more clock signals to control timing of the receiver slices, and a sub-band processing circuit that processes the digital signals from the receiver slices.

The embodiments described herein provide systems and methods for digital correction in low intermediate frequency (IF) receivers. Specifically, the embodiments described herein use digital correction techniques that can correct for signal distortions in low IF receivers caused by I-Q imbalance, including both I-Q magnitude imbalance and I-Q phase imbalance. In general, the embodiments described herein are implemented to at least partially cancel an image of a blocking signal in the complex digital signal. Such a cancellation can be implemented to at least partially cancel an image of blocking signal where that image occurs at or near the intermediate frequency. In one embodiment, a corrector is implemented in a low RF receiver and is configured to receive a complex digital signal that includes an image of a blocking signal. Such a low RF receiver can further include a trainer configured to train the corrector to generate the cancellation signal.

The embodiments described herein provide systems and methods for digital correction in low intermediate frequency (IF) receivers. Specifically, the embodiments described herein use digital correction techniques that can correct for signal distortions in low IF receivers caused by I-Q imbalance, including both I-Q magnitude imbalance and I-Q phase imbalance. In general, the embodiments described herein are implemented to at least partially cancel an image of a blocking signal in the complex digital signal. Such a cancellation can be implemented to at least partially cancel an image of blocking signal where that image occurs at or near the intermediate frequency. In one embodiment, a corrector is implemented in a low RF receiver and is configured to receive a complex digital signal that includes an image of a blocking signal. Such a low RF receiver can further include a corrector controller to selectively enable the corrector.

A frequency difference compensation unit (510) generates a carrier recovery signal by compensating for a frequency difference between a local light beam and an optical signal in a plurality of digital signals. A first symbol determination unit (521) determines the symbol position of the carrier recovery signal in which a frequency difference is compensated for, in accordance with the signal arrangement of multi-value modulation. A second symbol determination unit (522) determines the symbol position of the carrier recovery signal in which a frequency difference is compensated for, in accordance with a signal arrangement in which the number of multi-values of the multi-value modulation is reduced. A loop filter unit (540) and a compensation signal generation unit (550) temporarily generates a compensation signal using a determination result of the second symbol determination unit (522), and then regularly generates the compensation signal using a determination result of the first symbol determination unit (521).

Calibrating a Gaussian frequency-shift keying modulation index includes generating a training sequence of bits, shaping a pulse from the training sequence according to an initial modulation index, and converting the shaped signal to a transmission signal. The transmission signal is then either looped through a radio frequency core or processed by frequency deviation estimation hardware to determine a frequency deviation. The frequency deviation is converted to a new modulation index, and potentially a ratio between a target modulation index and a measured modulation index as a scaling factor. The process is then iteratively repeated until a threshold frequency deviation is achieved.

A battery powered node within a wireless mesh network maintains a mapping between temperature and oscillator drift and compensates for oscillator drift based on this mapping. When the mapping includes insufficient data points to map the current temperature to an oscillator drift value, the battery powered node requests calibration packets from an adjacent upstream node in the network. The adjacent node transmits two calibration packets with a transmit time delta and also indicates this time delta in the first calibration packet. The battery powered node receives the two calibration packets and measures the receive time delta. The battery powered node compares the transmit time delta to the receive time delta to determine oscillator drift compared to an oscillator in the adjacent node. The battery powered node then updates the mapping based on the current temperature and determined oscillator drift.