Graphene ink compositions comprising nitrocellulose and related methods of use comprising either thermal or photonic annealing.

A surface mountable coupler may include a monolithic base substrate having a first surface, a second surface, a length in an X-direction, and a width in a Y-direction that is perpendicular to the X-direction. A plurality of ports may be formed over the first surface of the monolithic base substrate including a coupling port, an input port, and an output port. The coupler may include a first thin film inductor and a second thin film inductor that is inductively coupled with the first thin film inductor and electrically connected between the input and output ports. A thin film circuit may electrically connect the first thin film inductor with the coupling port. The thin film circuit may include at least one thin film component.

An aqueous composition for forming a micro-fluid jet printable dielectric film layer, methods for forming dielectric film layers, and dielectric film layers formed by the method. The aqueous composition includes from about 5 to about 20 percent by 65 weight of a polymeric binder emulsion, from about 10 to about 30 percent by weight of a humectant, from about 0 to about 3 percent by weight of a surfactant, and an aqueous carrier fluid. The aqueous composition has a viscosity ranging from about 2 to about 6 centipoise at a temperature of about 23° C.

A multilayer electronic device may include a plurality of dielectric layers stacked in a Z-direction that is perpendicular to an X-Y plane. The device may include a first conductive layer overlying one of the plurality of dielectric layers. The multilayer electronic device may include a second conductive layer overlying another of the plurality of dielectric layers and spaced apart from the first conductive layer in the Z-direction. The second conductive layer may overlap the first conductive layer in the X-Y plane at an overlapping area to form a capacitor. The first conductive layer may have a pair of parallel edges at a boundary of the overlapping area and an offset edge within the overlapping area that is parallel with the pair of parallel edges. An offset distance between the offset edge and at least one of the pair of parallel edges may be less than about 500 microns.

The present disclosure provides an electronic device including a substrate, an extending element, a conductive element and a first insulating layer. The substrate includes an edge. The extending element is disposed on the substrate and includes a first conductive layer and a semiconductor layer, the first conductive layer and the semiconductor layer are overlapped, and the semiconductor layer extends to the edge of the substrate. The conductive element is overlapped with the first conductive layer. The insulating layer is disposed between the conductive element and the extending element.

A control device configured for use in a load control system to control one or more electrical loads may comprise an actuation member having a front surface defining a touch sensitive surface configured to detect a point actuation along at least a portion of the front surface, a touch sensitive circuit, and a control circuit. The touch sensitive device may comprise one or more receiving capacitive touch pads located behind the actuation member and arranged in a linear array adjacent to the touch sensitive surface. The control circuit may be configured to operate using different filtering techniques based on the state/mode of the control device and/or based on whether the positions of point actuations by a user along the touch sensitive surface indicate a fine tune or gross adjustment by the user. For example, the control circuit may generate an output signal using light/no filtering or using heavy filtering.

Devices, systems, and methods for serial communication over a galvanically isolated channel are disclosed. A device includes a first IC device interface, first IO components connected to the first IC device interface, a second IC device interface, second IO components connected to the second IC device interface, an insulator layer having a first major surface and a second major surface, at least one pair of capacitor plates and corresponding interconnection paths on the first major surface, and at least one pair of capacitor plates and corresponding interconnection paths on the second major surface, wherein the at least one pair of capacitor plates on the first major surface of the insulator layer are aligned with the at least one pair of capacitor plates on the second major surface of the insulator layer to form at least one pair of capacitors.

A capacitor device to store electrical charge is disclosed that includes a first unit of a first conductor layer fabricated from a first material. The first conductor layer is sandwiched between two dielectric layers. This assembly is layered on a second unit of a second conductor layer fabricated from a second material and sandwiched between two additional dielectric layers. The first conductor layers are all electrically connected to one another, and the second conductor layers being electrically connected to one another but are not electrically connected to the first conductor. Any multiple of first and second units may be utilized.

A printed circuit board includes: a first layer including a first ground including a first opening, wherein a first ground wire is within the first opening; a second layer disposed in a direction from the first layer and including a second ground including a second opening, wherein the second opening at least partially overlaps with the first opening and wherein a second ground wire is within the second opening; a third layer between the first layer and the second layer and including a third opening, wherein the third opening at least partially overlaps with the first opening and wherein a first via pad is within the third opening; and a fourth layer between the second layer and the third layer and including a fourth opening, wherein the fourth opening at least partially overlaps with the third opening and wherein a second via pad is within the fourth opening.

A leadwire for physiological patient monitoring is provided that transfers potentials received at a chest electrode to a data acquisition device. The leadwire includes an electrode end connectable to the chest electrode and a first conductive layer extending from the electrode end. The leadwire also has a device end connectable to a data acquisition device and a second conductive layer extending from the device end. The first conductive layer is galvanically isolated from the second conductive layer such that the first conductive layer and the second conductive layer form a capacitor.