Patent classifications
H05K2203/0369
PHOSPHOR SUBSTRATE, LIGHT EMITTING SUBSTRATE, AND LIGHTING DEVICE
A phosphor substrate of the present invention is a phosphor substrate having a plurality of light emitting elements mounted on one surface, and includes an insulating substrate, a first electrode group which is disposed on one surface of the insulating substrate and includes a plurality of electrodes bonded to the plurality of light emitting elements, a phosphor layer which is disposed on one surface of the insulating substrate and includes a phosphor in which a light emission peak wavelength, in a case where light emitted by light emitting element is used as excitation light, is in a visible light region, and a second electrode group which is disposed on the other surface of the insulating substrate and includes a plurality of electrodes.
A Method and Apparatus for Preparing a PCB Product Having Highly Dense Conductors
A method for preparing a PCB product having highly dense conductors, the method including providing a PCB substrate including a conductive layer, employing an inkjet printer to selectively print unexposed photosensitive patterns on the PCB substrate, the unexposed photosensitive patterns having a thickness of less than 5 pm, exposing the photosensitive patterns to radiation thereby to define exposed patterns, the exposed patterns having a pitch less than 20 pm and wet etching the conductive layer in accordance with a pattern defined by the exposed patterns thereby to define the highly dense conductors having a pitch of less than 30 pm.
METHOD FOR MANUFACTURING WIRING BOARD OR WIRING BOARD MATERIAL
Provide are a method for manufacturing a wiring board or a wiring board material, and the wiring board obtained by the method, which allows columnar metal members to be inserted into the wiring board at once using a simple operation, enables alignment without requiring strict accuracy, can handle columnar metal members having different shapes, and imparts sufficiently high adhesive strength to the columnar metal members.
The method includes the steps of: laminating a laminate material LM including the support sheet 10 having the columnar metal members 14 formed thereon, a wiring board WB or a wiring board material WB′ having a plurality of openings in portions corresponding to the columnar metal members 14, and a prepreg 16′ having a plurality of openings in portions corresponding to the columnar metal members 14 and containing a thermosetting resin such that the columnar metal members 14 are positioned in the respective openings; integrating the laminate material LM by heating and pressing to obtain a laminate LB including a thermosetting resin filled between an inner surface of each of the openings of the wiring board WB or the wiring board material WB′ and each of the columnar metal members 14; and peeling at least the support sheet 14 from the laminate LB.
Manufacturing method of circuit board
A manufacturing method of a circuit board including the following steps is provided. A carrier substrate is provided. A patterned photoresist layer is formed on the carrier substrate. An adhesive layer is formed on the top surface of the patterned photoresist layer. A dielectric substrate is provided. A circuit pattern and a dielectric layer covering the circuit pattern are formed on the dielectric substrate, wherein the dielectric layer has an opening exposing a portion of the circuit pattern. The adhesive layer is adhered to the dielectric layer in a direction that the adhesive layer faces of the dielectric layer. The carrier substrate is removed. A patterned metal layer is formed on a region exposed by the patterned photoresist layer. The patterned photoresist layer is removed. The adhesive layer is removed.
CONDUCTOR TRACE STRUCTURE REDUCING INSERTION LOSS OF CIRCUIT BOARD
A conductor trace structure reducing insertion loss of circuit board, the circuit board laminates an outer layer circuit board, an inner layer circuit board and a glass fiber resin films which arranged between each board; before laminated process, the conductor traces of the inner layers had formed by etching of imaging transfer process and conductor traces had been roughed process for making the glass fiber resin films having good adhesive performance during laminating; before etching of imaging transfer process that forms the conductor traces of the outer layers or solder resist coat process or coating polymer materials, the conductor traces have been roughed process to make insulating resin layer of the solder resist coat or polymer materials to has better associativity; wherein a smooth trench is formed by physical or chemical process constructed on the roughed conductor traces surface to guide electric ions transmitted on these smooth trench surface to enhance electric ions transmission rate, resulting in reducing the impedance so as to achieve reducing insertion loss.
TEXTURED TEST PADS FOR PRINTED CIRCUIT BOARD TESTING
A printed circuit board includes a substrate and at least one electrical circuit provided at least partially on a surface layer of thee printed circuit board. The electrical circuit includes an electrical trace that is in electrical connection with a test pad provided for accessibility on the surface layer, the test pad being sized and shaped for probing to test an aspect of the circuit, the test pad having a conductive probe surface that is structured to provide at least one vertical surface that extends from the probe surface toward the surface layer and thus providing an edge between the vertical surface and the probe surface, the probe surface having a coating of a material to protect the conductive probe surface from corrosion.
Textured test pads for printed circuit board testing
A printed circuit board includes a substrate and at least one electrical circuit provided at least partially on a surface layer of the printed circuit board. The electrical circuit includes an electrical trace that is in electrical connection with a test pad provided for accessibility on the surface layer, the test pad being sized and shaped for probing to test an aspect of the circuit, the test pad having a conductive probe surface that is structured to provide at least one vertical surface that extends from the probe surface toward the surface layer and thus providing an edge between the vertical surface and the probe surface, the probe surface having a coating of a material to protect the conductive probe surface from corrosion.
Method for manufacturing flexible printed circuit board (FPCB) and apparatus for manufacturing FPCB
The present disclosure relates to an apparatus for manufacturing flexible printed circuit board (FPCB) and method for manufacturing the FPCB, having no limitations of length of a circuit pattern being formed on a base film.
TEXTURED TEST PADS FOR PRINTED CIRCUIT BOARD TESTING
A printed circuit board includes a substrate and at least one electrical circuit provided at least partially on a surface layer of the printed circuit board. The electrical circuit includes an electrical trace that is in electrical connection with a test pad provided for accessibility on the surface layer, the test pad being sized and shaped for probing to test an aspect of the circuit, the test pad having a conductive probe surface that is structured to provide at least one vertical surface that extends from the probe surface toward the surface layer and thus providing an edge between the vertical surface and the probe surface, the probe surface having a coating of a material to protect the conductive probe surface from corrosion.
Carrier substrate
A carrier substrate includes a circuit structure layer, a first solder resist layer, a second solder resist layer and conductive towers. The circuit structure layer includes a core structure layer, a first circuit layer and a second circuit layer. The first solder resist layer has first openings exposing a portion of the first circuit layer. The second solder resist layer has second openings exposing a portion of the second circuit layer. The conductive towers are disposed at the first openings, higher than a surface of the first solder resist layer and connected with the first openings exposed by the first circuit layer, wherein a diameter of each of the conductive towers gradually increases by a direction from away-from the first openings towards close-to the first openings. A diameter of the second conductive towers is greater than that of the first conductive towers.