Embodiments of the invention include flexible circuit board interconnections and methods regarding the same. In an embodiment, the invention includes a method of connecting a plurality of flexible circuit boards together comprising the steps applying a solder composition between an upper surface of a first flexible circuit board and a lower surface of a second flexible circuit board; holding the upper surface of the first flexible circuit board and the lower surface of the second flexible circuit board together; and reflowing the solder composition with a heat source to bond the first flexible circuit board and the second flexible circuit board together to form a flexible circuit board strip having a length longer than either of the first flexible circuit board or second flexible circuit board separately. In an embodiment the invention includes a circuit board clamp for holding flexible circuit boards together, the clamp including a u-shaped fastener; a spring tension arm connected to the u-shaped fastener; and an attachment mechanism connected to the spring tension arm. Other embodiments are also included herein.

A method of making a wiring board includes forming a first capacitor carrier layer with a first embedded chip capacitor, a first insulation layer disposed on an upper surface, a second insulation layer disposed on a lower surface, first upper and lower conductive vias in conductive contact with a first electrode, and second upper and lower conductive vias in conductive contact with a second electrode. The method also includes forming a second capacitor carrier layer similar to the first. The method further includes forming a bonded laminate comprising in sequence an upper insulation layer, the first capacitor carrier layer, a center insulation layer, the second capacitor carrier layer, and a lower insulation layer. The method also includes forming a through-hole through the laminate and forming a conductive coating within the through-hole to provide a conductive through-hole. A wiring board also includes the bonded laminate and the embedded capacitors.

The present disclosure relates to extremely high frequency (“EHF”) systems and methods for the use thereof, and more particularly to board-to-board connections using contactless connectors.

A printing process for printing an ink pattern on a substrate is provided. The ink pattern to be printed is based on an available pattern layout. The pattern layout defines a desired layout of the ink pattern to be printed. Based on the pattern layout an input image for allocating dot positions of the ink pattern is generated. The printing process includes a step of comparing a scan image with the input image to carry out a quality inspection to detect any print defects in the printed ink pattern. The printing process includes a step of providing a decision on an approval or a rejection of the printed ink pattern. In case of an approval, the substrate can be supplied to a subsequent processing station to finalize the substrate. In case of a rejection, the substrate including print defects can be recycled.

An apparatus includes a printed circuit board (PCB) that includes a woven glass laminate layer. The woven glass laminate layer includes a plurality of glass bundles woven together, where a marker structure including at least one marker is defined within the woven glass laminate layer. A security chip is coupled with the PCB and includes memory that stores an authentication identifier of the PCB, where the authentication ID includes a representation of the marker structure.

Multiple designs for a multi-layer circuit may be simulated to determine impedance profiles of each design, allowing a circuit designer to select a design based on the impedance profiles. One feature that can be modified is the structure surrounding the barrels of a differential VIA on layers that are not connected to the differential VIA. Specifically, one antipad can be used that surrounds both barrels or two antipads can be used, with one antipad for each barrel. Additionally, the size of the antipad or antipads can be modified. These modifications affect the impedance of the differential VIA. Additionally, a conductive region may be placed that connects to the VIA barrel even though the circuit on the layer does not connect to the VIA. This unused pad, surrounded by a non-conductive region, also affects the impedance of the differential VIA.

A method of compensating misalignment during manufacturing laminate-type component carriers is disclosed. The method includes detecting an image of a region of interest of a component carrier structure during manufacturing the component carriers based on the component carrier structure, identifying a structural feature in the image of the region of interest showing misalignment with respect to a target design, and at least partially compensating the identified misalignment of the structural feature by modifying the target design of at least one correlated structural feature to be manufactured subsequently, wherein the at least one correlated structural feature is correlated to said structural feature showing misalignment.

A display module and its formation method are provided in the present disclosure. The display module includes a main flexible circuit board, including a first binding terminal, a second binding terminal, a first test point and a second test point, where the first test point is electrically connected to the first binding terminal, and the second test point is electrically connected to the second binding terminal; and further includes an auxiliary flexible circuit board, including a third binding terminal and a fourth binding terminal, where the third binding terminal is electrically connected to the fourth binding terminal, the first binding terminal is disposed corresponding to the third binding terminal, and the second binding terminal is disposed corresponding to the fourth binding terminal.

A method of manufacturing an electronic device including the following steps is provided herein. A plurality of first electronic components is provided. The plurality of first electronic components is transferred onto a plurality of pickup sites. An empty pickup site from the plurality of pickup sites may be figured out, wherein the plurality of first electronic components is absent at the empty pickup site. A second electronic component is transferred onto the empty pickup site. A target substrate is provided. The plurality of first electronic components and the second electronic component are transferred onto the target substrate.

A reel-to-reel lamination method to laminate a metal foil or circuitry pattern on the fly. The method includes applying a UV laminate or thermoset laminate to the metal foil or the circuitry pattern reel to reel, and then apply a UV radiation or heat to the laminate. There can be an optional enclosure connected to a suction source. The enclosure can have a flexible bladder that physically compresses the laminate.