An image sensor includes: a plurality of pixels each having a photoelectric conversion unit that converts incident light into an electric charge, the incident light being incident from one side of a substrate, and an output unit that outputs a signal caused by the electric charge, the plurality of pixels being arranged in a first direction and a second direction intersecting the first direction; and an accumulation unit provided to be stacked on the photoelectric conversion unit on a side opposite to the one side of the substrate, the accumulation unit accumulating the signal.

There is provided a detection panel, including: a substrate, gate lines, signal detection lines and pixels, a thin film transistor and an optical sensor are arranged in each pixel, the thin film transistor has a gate coupled with the corresponding gate line, a first electrode coupled with the corresponding signal detection line, and a second electrode coupled with a third electrode of the optical sensor in the same pixel; the pixels include at least one detecting pixel and at least one marking pixel, a first bias voltage line and a second bias voltage line are arranged on a side of the optical sensor away from the substrate, a fourth electrode of the optical sensor in the detecting pixel is coupled with the corresponding first bias voltage line, and the second electrode of the thin film transistor in the marking pixel is coupled with the corresponding second bias voltage line.

An imaging device in which noise can be reduced, and an electronic device using this device. The imaging device includes a light receiving element, and a read circuit. A field effect transistor in the read circuit has a semiconductor layer in which a channel is formed, a gate electrode that covers the semiconductor layer, and a gate insulating film disposed between the semiconductor layer and the gate electrode. The semiconductor layer has a main surface, and a first side surface on one end side of the main surface in a gate width direction of the field effect transistor. The gate electrode has a first portion that faces the main surface via the gate insulating film, and a second portion that faces the first side surface via the gate insulating film. A crystal plane of the first side surface is a plane or a plane equivalent to the plane.

An image sensor structure including a substrate, a nanowire structure, a first conductive line, a second conductive line, and a third conductive line is provided. The nanowire structure includes a first doped layer, a second doped layer, a third doped layer, and a fourth doped layer sequentially stacked on the substrate. The first doped layer and the third doped layer have a first conductive type. The second doped layer and the fourth doped layer have a second conductive type. The first conductive line is connected to a sidewall of the second doped layer. The second conductive line is connected to a sidewall of the third doped layer. The third conductive line is connected to the fourth doped layer.

An image pickup element includes: a semiconductor substrate including a photoelectric conversion section for each pixel; a pixel separation groove provided in the semiconductor substrate; and a fixed charge film provided on a light-receiving surface side of the semiconductor substrate, wherein the fixed charge film includes a first insulating film and a second insulating film, the first insulating film being provided contiguously from the light-receiving surface to a wall surface and a bottom surface of the pixel separation groove, and the second insulating film being provided on a part of the first insulating film, the part corresponding to at least the light-receiving surface.

An imaging device connected to a neural network is provided. An imaging device having a neuron in a neural network includes a plurality of first pixels, a first circuit, a second circuit, and a third circuit. Each of the plurality of first pixels includes a photoelectric conversion element. The plurality of first pixels is electrically connected to the first circuit. The first circuit is electrically connected to the second circuit. The second circuit is electrically connected to the third circuit. Each of the plurality of first pixels generates an input signal of the neuron. The first circuit, the second circuit, and the third circuit function as the neuron. The third circuit includes an interface connected to the neural network.

Provided are a detection substrate and a ray detector. The detection substrate includes: a base substrate; a plurality of detection pixels located on the base substrate, at least one detection pixel serves as a detection marking pixel. The detection marking pixel includes: a storage capacitor, a first electrode plate of the storage capacitor coupled to a bias voltage end; a discharge circuit configured to write a signal of the bias voltage end into a second electrode plate of the storage capacitor under the control of a first scanning signal end; and a reading circuit coupled to an external reading circuit, the reading circuit configured to write the voltage of the second electrode plate of the storage capacitor into the external reading circuit and write a reference signal of the external reading circuit into the second electrode plate of the storage capacitor under the control of a second scanning signal end.

A pixel array may include a group of time-of-flight (ToF) sensors. The pixel array may include an image sensor comprising a group of pixel sensors. The image sensor may be arranged among the group of ToF sensors such that the image sensor is adjacent to each ToF sensor in the group of ToF sensors.

The present technique relates to a solid-state imaging device, a solid-state imaging device manufacturing method, and an electronic apparatus that are capable of providing a solid-state imaging device that can prevent generation of RTS noise due to miniaturization of amplifying transistors, and can achieve a smaller size and a higher degree of integration accordingly. A solid-state imaging device includes a photodiode as a photoelectric conversion unit, a transfer gate that reads out charges from the photodiode, a floating diffusion from which the charges of the photodiode are read by an operation of the transfer gate, and an amplifying transistor connected to the floating diffusion. More particularly, the amplifying transistor is of a fully-depleted type. Such an amplifying transistor includes an amplifier gate (gate electrode) extending in a direction perpendicular to convex strips formed by processing a surface layer of a semiconductor layer, for example.

A photodetector including a substrate having a semiconductor material layer, such as a silicon-containing layer, and a germanium-based well embedded in the semiconductor material layer, where a gap is located between a lateral side surface of the germanium-based well and the surrounding semiconductor material layer. The gap between the lateral side surface of the germanium-based well and the surrounding semiconductor material layer may reduce the surface contact area between the germanium-containing material of the well and the surrounding semiconductor material, which may be a silicon-based material. The formation of the gap located between a lateral side surface of the germanium-based well and the surrounding semiconductor material layer may help minimize the formation of crystal defects, such as slips, in the germanium-based well, and thereby reduce the dark current and improve photodetector performance.