Apparatus for detecting noise in power supply of PLC analogue input and output module

Abstract

An apparatus for detecting noise in a power supply of a PLC analog input/output module is provided. The apparatus may include a capacitor configured to extract a noise determination target voltage from a driving voltage outputted from the power supply; a voltage conversion unit configured to convert the noise determination target voltage outputted from the capacitor and to output the converted noise determination target voltage; a comparison unit configured to compare the noise determination target voltage converted by the voltage conversion unit with a reference voltage; and a determination unit configured to determine whether the noise determination target voltage is a noise, based on a comparison result by the comparison unit.

Claims

1. An apparatus for detecting noise in a power supply of a PLC analog input/output module, the apparatus comprising: a capacitor configured to extract a noise determination target voltage from a driving voltage outputted from the power supply; a voltage conversion unit configured to convert the noise determination target voltage outputted from the capacitor and to output the converted noise determination target voltage; a comparison unit configured to compare the noise determination target voltage converted by the voltage conversion unit with a reference voltage; and a determination unit configured to determine whether the noise determination target voltage is a noise, based on a comparison result by the comparison unit, wherein the voltage conversion unit includes: a half-wave rectifier configured to half-wave rectify the noise determination target voltage outputted from the capacitor; an inverting adder configured to invert and add the noise determination target voltage half-wave rectified by the half-wave rectifier; an inverting amplifier configured to output the noise detection determination target voltage inverted and added by the inverting adder in an inversed form of a same size; and a low pass filter configured to low-pass filter the noise determination target voltage inverted by the inverting amplifier, and wherein the half-wave rectifier includes a first resistor, a second resistor, an op-amp, a first diode and a second diode.

2. The apparatus of claim 1, wherein the comparison unit outputs a positive voltage or a negative voltage when the noise determination target voltage is higher than the reference voltage, or outputs a negative voltage or a positive voltage when the noise determination target voltage is lower than the reference voltage.

3. The apparatus of claim 2, wherein the determination unit outputs a high level voltage or a low level voltage when the noise determination target voltage is determined to be a noise, or outputs a low level voltage or a high level voltage when the noise determination target voltage is determined not to be a noise.

4. The apparatus of claim 1, wherein the determination unit is an NMOS (N-channel Metal-Oxide-Semiconductor) FET (Field Effect Transistor) or a PMOS (P-channel MOS) FET configured to be turned on or turned off, according to the comparison result outputted from the comparison unit.

5. The apparatus of claim 1, wherein a negative (−) input terminal of the op-amp is connected to the capacitor and a positive (+) input terminal is earthed, the first resistor is connected between the negative (−) input terminal of the op-amp and the capacitor, an anode of the first diode is connected between the negative (−) input terminal of the op-amp and the first resistor, a cathode of the first diode is connected to an output terminal of the op-amp, an anode of the second diode is connected to the output terminal of the op-amp, a cathode of the second diode is connected to an output side of the half-wave rectifier, a side of the second resistor is connected between the first resistor and the op-amp, and another side of the second resistor is connected to the output side of the half-wave rectifier.

6. The apparatus of claim 1, wherein the determination unit outputs a high level voltage or a low level voltage when the noise determination target voltage is determined to be a noise, or outputs a low level voltage or a high level voltage when the noise determination target voltage is determined not to be a noise.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a block diagram illustrating an example of a PLC system including an apparatus for detecting noise in a power supply of a PLC analog input/output module according to an exemplary embodiment of the present disclosure.

(2) FIG. 2 is a block diagram illustrating an apparatus for detecting noise in a power supply of a PLC analog input/output module according to an exemplary embodiment of the present disclosure.

(3) FIG. 3 is a detailed circuit diagram of a PLC analog input/output module according to an exemplary embodiment of the present disclosure.

(4) FIG. 4a, FIG. 4b, FIG. 4c, FIG. 4d, FIG. 4e, FIG. 4f, and FIG. 4g are views illustrating an example of output voltage waveform of each partial structure of an apparatus for detecting noise in a power supply of a PLC analog input/output module according to an exemplary embodiment of the present disclosure.

DETAILED DESCRIPTION

(5) Advantages and features of the present disclosure and methods to implement them will now be described more fully hereinafter with reference to exemplary embodiments accompanied by drawings. The present disclosure may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. The scope of the present disclosure shall be defined only by the scope of claims. The same reference numbers indicate the same components throughout the specification. In the attached figures, the thickness of layers and regions may be exaggerated for clarity.

(6) When it is determined that a detailed description about known function or structure relating to the present disclosure may evade the main point of the present disclosure, the detailed description may be omitted. In addition, the meaning of specific terms or words used in the specification and claims should not be limited to the literal or commonly employed sense, but should be construed or may be different in accordance with the intention of a user or an operator and customary usages. Therefore, the definition of the specific terms or words should be based on the contents across the specification.

(7) FIG. 1 is a block diagram illustrating an example of a PLC system including an apparatus for detecting noise in a power supply of a PLC analog input/output module according to an exemplary embodiment of the present disclosure.

(8) Referring to FIG. 1, the PLC system may include an analog module (100), a power supply (200) and a noise detection apparatus (300), and may further include other components. However, only components required for description of the present disclosure are illustrated herein.

(9) Here, the analog module (100) may be an analog input module configured to convert an analog signal provided from a sub-device to a digital signal and provide the digital signal to an internal calculation process unit, and may be an analog output module configured to receive a digital signal reflecting a calculation process result provided by the calculation process unit, convert the digital signal to an analog signal, and provide the analog signal to the sub-device.

(10) The power supply (200) is a structure in order to supply a driving electric power required for driving the analog module (200). The power supply (200) convert electric power applied from the outside to an electric power of appropriate level for driving the analog module (100), and may provide the converted electric power to the analog module (100).

(11) Meanwhile, the noise detection apparatus (300) may detect whether a noise is introduced in electric power outputted from the power supply (200). The structure of the noise detection apparatus (300) will be described hereinafter based on the enclosed drawings.

(12) FIG. 2 is a block diagram illustrating an apparatus for detecting noise in a power supply of a PLC analog input/output module according to an exemplary embodiment of the present disclosure; FIG. 3 is a detailed circuit diagram of a PLC analog input/output module according to an exemplary embodiment of the present disclosure; and FIG. 4a, FIG. 4b, FIG. 4c, FIG. 4d, FIG. 4e, FIG. 4f, and FIG. 4g are views illustrating an example of output voltage waveform of each partial structure of an apparatus for detecting noise in a power supply of a PLC analog input/output module according to an exemplary embodiment of the present disclosure.

(13) Referring to FIGS. 2 to 4g, the apparatus (300) for detecting noise in a power supply of a PLC analog input/output module according to an exemplary embodiment of the present disclosure may include a capacitor (310), a voltage conversion unit (320), a comparison unit (330), a reference voltage generation unit (340) and a determination unit (350).

(14) The capacitor (310) may be configured to extract a noise from a driving voltage outputted from the power supply (200).

(15) That is, the capacitor (310) has a characteristic to block direct current ingredients, and the driving voltage is of direct current. Therefore, the output voltage of the capacitor (310) becomes ‘0’, unless a noise is included in the driving current.

(16) However, as illustrated in FIG. 4a, the capacitor (310) outputs an alternate current voltage corresponding to the noise, when the noise is included in the driving voltage.

(17) The voltage (V.sub.1) outputted from the capacitor (310) is used in order to determine whether a noised is included. Thus, the voltage (V.sub.1) will be referred to as a ‘noise determination target voltage’.

(18) The voltage conversion unit (320) may convert the noise determination target voltage in an alternate current form outputted from the capacitor (310) and output the converted noise determination target voltage.

(19) Here, the voltage conversion unit (320) may output the noise determination target voltage, by half-wave rectifying and low pass filtering the noise determination target voltage. Detailed structure and operation of the voltage conversion unit (320) will be described hereinafter.

(20) The comparison unit (330) may compare the noise determination target voltage converted by the voltage conversion unit (320) with a reference voltage (Vref) outputted from the reference voltage generation unit (340) and may output the comparison result.

(21) Here, as illustrated in FIG. 4f, the comparison result (V.sub.6) may be a negative (−) or a positive (+) voltage. The volume of the negative (−) and the positive (+) voltage may be identical to each other.

(22) Meanwhile, the comparison unit (330) may compare the noise determination target voltage with the reference voltage (Vref), and may output a negative (−) voltage when the noise determination target voltage is higher than the reference voltage, or output a positive (+) voltage when the noise determination target voltage is lower than the reference voltage.

(23) Selectively, the comparison unit (330) may compare the noise determination target voltage with the reference voltage (Vref), and may output a positive (+) voltage when the noise determination target voltage is higher than the reference voltage, or output a negative (−) voltage when the noise determination target voltage is lower than the reference voltage.

(24) The reference voltage generation unit (340) may generate a reference voltage used for the comparison unit (330) to compare with the noise determination target voltage.

(25) The determination unit (350) may receive the comparison result outputted from the comparison unit (330), and may determine whether the noise determination target voltage is a noise and output the determination result.

(26) Here, as illustrated in FIG. 4g, the determination unit (350) may be configured to output voltages of different levels based on the determination result. The determination unit (350) may be an NMOS (N-channel Metal-Oxide-Semiconductor) FET (Field Effect Transistor) or a PMOS (P-channel MOS) FET.

(27) As an example, the determination unit (350) may output a high level voltage when the comparison result received from the comparison unit (330) is a positive (+) voltage, or may output a low level voltage when the noise determination target voltage is a negative (−) voltage.

(28) Selectively, the determination unit (350) may output a low level voltage when the comparison result received from the comparison unit (330) is a positive (+) voltage, or output a high level voltage when the noise determination target voltage is a negative (−) voltage.

(29) Hereinafter, the structure and operation of the voltage conversion unit according to an exemplary embodiment of the present disclosure will be specifically described with reference to FIGS. 3 and 4a-4g.

(30) The voltage conversion unit (320) according to an exemplary embodiment of the present disclosure may include a half-wave rectifier (321), an inverting adder (322), an inverting amplifier (323) and a low pass filter (324).

(31) The half-wave rectifier (321) may half-wave rectify the noise determination target voltage having passed through the capacitor (310) (FIG. 4b). The inverting adder (322) may invert and add the noise determination target voltage that has been half-wave rectified by the half-wave rectifier (321) (FIG. 4c).

(32) The half-wave amplifier (323) may output the noise determination target voltage inverted and added by the inverting adder (322) as a voltage in an inverted waveform of the same volume (FIG. 4b), and the low pass filter (324) may low pass filter the noise determination target voltage inverted by the inverting amplifier (323) (FIG. 4e).

(33) Hereinafter, the structure requiring supplementary descriptions in the voltage conversion unit (320) will be further described. Descriptions for the generally used structure will be omitted.

(34) The half-wave rectifier (321) may include first and second resistors (R1, R2), a first opi-amp (321a), first and second diodes (D1, D2).

(35) Here, a negative (−) input terminal the first opi-amp (321a) may be connected to the capacitor (310) and a positive (+) input terminal may be earthed. The first resistor (R1) may be connected between a negative (−) input terminal of the first opi-amp (321a) and the capacitor (310).

(36) An anode of the first diode (D1) may be connected between a negative (−) input terminal of the first opi-amp (321a) and the first resistor (R1), and a cathode of the first diode (D1) may be connected to an output terminal of the first opi-amp (321a).

(37) In addition, an anode of the second diode (D2) may be connected to an output terminal of the first opi-amp (321a), and a cathode of the second diode (D2) may be connected to an output side of the half-wave rectifier (321).

(38) Meanwhile, a side of the second resistor (R2) may be connected between the first resistor (R1) and the first opi-amp (321a), and another side of the second resistor (R2) may be an output side of the half-wave rectifier (321). Thus, the second resistor (R2) may be connected to an anode of the first diode (D1) and a cathode of the second diode (D2).

(39) When looking at operations of the half-wave rectifier (321) having such structure, in the case where the first resistor (R1) and the second resistor (R2) are set as the same value, and when the noise determination target voltage (V1) is higher than zero (0), the first diode (D1) is turned on and the second diode (D2) is turned off so that the output voltage (V2) of the half-wave rectifier (321) becomes zero (0).

(40) Contrariwise, when the noise determination target voltage (V1) is lower than zero (0), the first diode (D1) is turned off and the second diode (D2) is turned on, so that the output voltage (V2) of the half-wave rectifier (321) becomes −V1 according to the following Equation 1.

(41) $\begin{array}{cc}{V}_2=-\frac{R_2}{R_1}{V}_1=-V_1& \left[\mathrm{Equation}1\right]\end{array}$

(42) Therefore, the polarity of an area where the noise determination target voltage (V1) is under zero (0) may be changed and outputted as an output voltage (V2) of the half-wave rectifier (321).

(43) Meanwhile, the inverting adder (322) may include third to fifth resistors (R3, R4, R5) and a second opi-amp (322a).

(44) A negative (−) input terminal of the second opi-amp (322a) may be connected to an output terminal of the half-wave rectifier (321), and a positive (+) input terminal of the second opi-amp (322a) may be earthed.

(45) The third resistor (R3) may be connected between negative (−) input terminals of the capacitor (310) and the second opi-amp (322a), the fourth resistor (R4) may be connected between an output terminal of the second opi-amp (322a) and a negative (−) input terminal of the second opi-amp (322a), and the fifth resistor (R5) may be connected between an output side of the half-wave rectifier (321) and a negative (−) input terminal of the second opi-amp (322a).

(46) When looking at operations of the inverting adder (322) having such structure, in the case where R3=R4 and R5=2R4, the output voltage (V.sub.3) of the inverting adder (322) may be determined according to the following Equation 2.

(47) $\begin{array}{cc}{V}_3=-\left(\frac{R_4}{R_3}{V}_1+\frac{R_4}{R_5}{V}_2\right)=-\left(V_1+2V_2\right)& \left[\mathrm{Equation}2\right]\end{array}$

(48) Therefore, V.sub.2=0 when the noise determination target voltage (V.sub.1) is higher than zero (0), and therefore V.sub.3=−V.sub.1. In addition, V.sub.2=−V.sub.1 when the noise determination target voltage (V.sub.1) is lower than zero (0), and therefore V.sub.3=V.sub.1.

(49) To conclude, the output voltage (V.sub.3) of the inverting adder (322) may be outputted as a negative (−) waveform in the same volume as that of the noise determination target voltage (V.sub.1). The inverting amplifier (323) may invert the output voltage (V.sub.3) as a positive (+) waveform and output the inverted output voltage.

(50) Although an apparatus for detecting noise in a power supply of a PLC analog input/output module according to the present disclosure have been described with reference to a number of illustrative exemplary embodiments thereof, it should be understood that numerous other modifications and alternative embodiments can be devised by those skilled in the art that will fall within the spirit and scope of the principles of this invention. More particularly, various variations and modifications are possible in the component parts and/or arrangements of the subject combination arrangement within the scope of the disclosure, the drawing and the appended claims. In addition to variations and modifications in the component parts and/or arrangements, alternative uses will also be apparent to those skilled in the art.

(51) Therefore, the abovementioned exemplary embodiments and enclosed drawings are intended to be illustrative, and not to limit the scope of the claims. The scope of protection of the present disclosure is to be interpreted by the following claims, and that all the technical ideas within the equivalent scope of the scope of the present disclosure should be construed as being included.