TEMPERATURE-BASED CONTROL OF INDUCTOR DEMAGNETIZATION

Abstract

An integrated circuit for demagnetizing an inductive load includes a first switch to control current supplied by a voltage supply to the inductive load. A Zener diode includes an anode connected to a control terminal of the first switch and a cathode connected to the voltage supply. A second switch includes a control terminal and first and second terminals. A temperature sensing circuit is configured to sense a temperature of the first switch and to generate a sensed temperature. A comparing circuit includes inputs that receive a reference temperature and the sensed temperature and an output connected to the control terminal of the second switch.

Claims

1-20. (canceled)

21. A discharge circuit for an inductive load, comprising: a clamp circuit connected between a first reference potential and an output node, wherein the inductive load is connected to the output node; a temperature sensing circuit to generate a sensed temperature signal based on a temperature of the clamp circuit; and a first circuit including: a first switch connected between the output node and a second reference potential; and a comparing circuit to selectively open and close the switch based on the sensed temperature signal.

22. The discharge circuit of claim 21, wherein the clamp circuit includes: a second switch having a first terminal connected to the first reference potential and a second terminal connected to the output node; and a Zener diode having an anode connected to the output node and a cathode connected to the first reference potential.

23. The discharge circuit of claim 22, wherein: the first switch comprises first and second transistors including (DMOS) field effect transistor (FETs); and the second switch comprises a double-diffused metal oxide semiconductor DMOS FET.

24. The discharge circuit of claim 22, wherein the comparing circuit turns on the second switch when the sensed temperature signal is greater than a reference temperature signal and turns off the second switch when the sensed temperature signal falls below the reference temperature signal.

25. The discharge circuit of claim 22, wherein the comparing circuit turns on the second switch when the sensed temperature signal is greater than a reference temperature signal by a predetermined amount and turns off the second switch when the sensed temperature signal falls below the reference temperature signal by the predetermined amount.

26. The discharge circuit of claim 22, wherein: the first switch includes first and second transistors including body to epitaxial diodes; and the second switch comprises a transistor including a body to epitaxial diode.

27. The discharge circuit of claim 21, wherein the discharge circuit is implemented as an integrated circuit.

28. A discharge circuit for an inductive load, comprising: a first circuit including a first switch and a Zener diode, wherein the first circuit is connected to a first reference potential; a second switch connected to the first circuit and a second reference potential; an inductive load having a first terminal connected to the first circuit and the second switch and a second terminal connected to the second reference potential; and a second circuit to: turn off the second switch when a sensed temperature signal corresponding to the first circuit is less than a reference temperature signal to cause power to be dissipated from the inductive load by the first circuit at a first rate; and in response to the temperature of the first circuit being greater than or equal to the reference temperature signal, turn on the second switch to cause power to be dissipated from the inductive load by the second switch at a second rate that is less than the first rate.

29. The discharge circuit of claim 28, wherein: the first switch comprises a double-diffused metal oxide semiconductor (DMOS) field effect transistor (FET); and the second switch comprises first and second transistors including DMOS FETs.

30. The discharge circuit of claim 28, wherein the second circuit turns on the second switch when the sensed temperature signal is greater than the reference temperature signal and turns off the second switch when the sensed temperature signal falls below the reference temperature signal.

31. The discharge circuit of claim 28, wherein the second circuit comprises a comparing circuit.

32. The discharge circuit of claim 28, wherein: the second switch dissipates current at the second rate until the sensed temperature signal falls below the reference temperature signal by a predetermined amount the second switch dissipates current at the first rate after the sensed temperature signal falls below the reference temperature signal by the predetermined amount.

33. The discharge circuit of claim 28, wherein: the first switch comprises a transistor including a body to epitaxial diode; and the second switch includes first and second transistors including body to epitaxial diodes.

34. The discharge circuit of claim 28, wherein the discharge circuit is implemented as an integrated circuit.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The present disclosure will become more fully understood from the detailed description and the accompanying drawings, wherein:

[0023] FIG. 1 is an electrical schematic and functional block diagram of an integrated circuit including a high-side switch according to the present disclosure; and

[0024] FIGS. 2 and 3 include graphs illustrating temperature, current and voltage as a function of time.

[0025] In the drawings, reference numbers may be reused to identify similar and/or identical elements.

DETAILED DESCRIPTION

[0026] The present disclosure relates to systems and methods for safely demagnetizing an inductor or coil to protect an integrated circuit (IC) during demagnetization. The demagnetization can be performed without damage independent of an amount of energy to be dissipated. The systems and methods according to the present disclosure allow the use of relays of any size and allow the IC to be mounted in smaller packages.

[0027] As will be described further below, the circuit monitors temperature and performs in a typical manner until a predetermined temperature is exceeded. When the predetermined temperature is exceeded, the circuit provides protection at the expense of reduced performance. The performance reduction will have a negligible negative impact for most applications.

[0028] Controlled demagnetization is accomplished by automatically selecting a fast or slow demagnetization mode. During the fast demagnetization mode, the circuit behaves in a typical fashion. For example, the circuit may clamp the coil or inductor voltage to about 50V below V.sub.DD. During the fast demagnetization mode, the temperature will rise at a fast pace. Once the predetermined temperature is reached, the circuit switches to the slow demagnetization mode and will reduce power dissipation to a level that can be sustained indefinitely. During the slow demagnetization mode, the coil or inductor discharges at a slower rate and the IC temperature will decrease. Once the temperature has fallen back to an acceptable value, the fast demagnetization mode is initiated again. The circuit switches between the fast and slow demagnetization modes until the coil or inductor is completely discharged.

[0029] FIG. 1 illustrates an integrated circuit (IC) 10 including a circuit 20. The circuit 20 includes a high-side switch 28 having a first terminal connected to V.sub.DD, a second terminal connected to an output and a gate connected to a Zener diode 24. The high-side switch 28 includes a body to epitaxial (EPI) diode 32. A transistor 34 includes a first terminal connected to the output and a body to epitaxial (EPI) diode 36. A second terminal of the transistor 34 is connected to a first terminal of a transistor 38. A second terminal of the transistor 38 is connected to a reference potential such as ground. The transistor 38 includes a body to epitaxial (EPI) diode 40.

[0030] Gates of the first and second transistors 34 and 38 are connected to an output of a comparing circuit 44. The comparing circuit 44 may employ hysteresis. An inverting input of the comparing circuit 44 is connected to a first temperature reference T.sub.protection. A non-inverting input of the comparing circuit 44 is connected to a temperature sensor 48 that senses a temperature of the high-side switch 28.

[0031] A load 50 is connected to the output of the circuit 20. The load 50 may include an inductor L and a resistor R that are connected in series, although other types of loads or connections may be used.

[0032] The high-side switch 28 drives the load 50. The high-side switch 28 is made by a low-on-resistance, high-voltage transistor such as a R.sub.ON=0.05Ω, 65V double-diffused metal—oxide—semiconductor (DMOS) field effect transistors (FET). The maximum current I.sub.LOAD that has to be sourced is 1A. The Zener diode 24 is placed between V.sub.DD and a gate of the high-side switch 28 to implement the fast demagnetization mode. After the high-side switch 28 is turned off and the output is pulled negative by current of the inductor L, the Zener diode 24 turns on the high-side switch 28 and maintains V.sub.OUT=V.sub.DD−V.sub.ZENER−V.sub.GS. V.sub.is is the gate-source voltage of the high-side switch 28 needed to sustain I.sub.LOAD; since the high-side switch 28 is relatively large, V.sub.GS is in the order of 1V in some examples. In some examples, V.sub.DD=24V, V.sub.ZENER=50V, V.sub.GS=1V.fwdarw.V.sub.out.sub._.sub.demag=−27V.

[0033] Transistors 34 and 38 may be implemented using DMOS FETs with smaller area than the high-side switch (and therefore higher on-resistance). In some examples, R.sub.ON of the transistors 34 and 38 is 0.5Ω. The transistors 34 and 38 are normally kept in an off state (V.sub.GS=0V) and do not conduct current for either positive or negative values of V.sub.OUT due to opposite body-to-EPI diodes 36 and 40. The transistor 34 can be a p-channel transistor and the transistor 38 can be an n-channel transistor.

[0034] FIG. 2 shows a simulation of sample demagnetization curves of the high-side switch 28 during the fast demagnetization mode. The simulation in FIG. 2 was run with a thermal model for a quad-flat no-leads (QFN) package. The high-side switch 28 acts as a 50V clamp from V.sub.DD. IC temperature never reaches the T.sub.protection threshold. The temperature of the high-side switch 28 (T.sub.MHS) is monitored and, T.sub.MHS stays below T.sub.protection (which may be set to about 170° C. or another value in some examples).

[0035] Depending on the values of L, R and I.sub.LOAD and on package thermal dissipation properties, the temperature T.sub.MHS may exceed T.sub.protection during the fast demagnetization mode. Conventional high-side switches are unable to limit the temperature T.sub.MHS because the inductor current I.sub.LOAD cannot be limited. Therefore the high-side switch 28 would keep working as a 50V clamp device and would continue to dissipate high power and heat up. At some point, the circuit 20 may be permanently damaged.

[0036] According to the present disclosure, when the temperature T.sub.MHS reaches T.sub.protection, the slow demagnetization mode is initiated and both of the transistors 34 and 38 are turned on. I.sub.LOAD will start flowing through the transistors 34 and 38 instead of the high-side switch 28 and V.sub.OUT will increase from −27V to about −1V. The high-side switch 28 will stop dissipating power and the transistors 34 and 38 will start dissipating power (about 1/50 of the power dissipated by the high-side switch 28). The amount of power that is dissipated by the transistors 34 and 38 is small enough to be sustained indefinitely with the given package.

[0037] As a result, the inductor current will now decrease at slower rate and the IC will cool down. Once the temperature T.sub.MHS falls below T.sub.protection−T.sub.hysteresis, the transistors 34 and 38 will turn OFF. At this point, the high-side switch 28 will automatically be turned ON again by V.sub.OUT being pulled negative by the residual inductor current. The process will repeat until I.sub.LOAD disappears.

[0038] FIG. 3 shows an example of the slow demagnetization mode according to the present disclosure. The simulation in FIG. 3 was also run with a thermal model for the QFN package. Starting from a higher ambient temperature (e.g. 85° C. in this example) than in FIG. 2, the IC temperature reaches the T.sub.protection threshold. At that point, the slow demagnetization mode stops the temperature rise and protects the circuit 20.

[0039] The foregoing description is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. The broad teachings of the disclosure can be implemented in a variety of forms. Therefore, while this disclosure includes particular examples, the true scope of the disclosure should not be so limited since other modifications will become apparent upon a study of the drawings, the specification, and the following claims. As used herein, the phrase at least one of A, B, and C should be construed to mean a logical (A or B or C), using a non-exclusive logical OR. It should be understood that one or more steps within a method may be executed in different order (or concurrently) without altering the principles of the present disclosure.