METHOD OF ANALYZING A SIGNAL AND SIGNAL ANALYSIS DEVICE
20220043031 · 2022-02-10
Assignee
Inventors
Cpc classification
G01R13/325
PHYSICS
G01R13/32
PHYSICS
G01R13/345
PHYSICS
G01R13/02
PHYSICS
International classification
G01R13/34
PHYSICS
Abstract
A method of analyzing a signal is described. The method includes: setting a trigger condition to be applied; applying the trigger condition; acquiring at least two acquisitions associated with the input signal, each acquisition including a trigger event that matches the trigger condition set; determining a trigger time for each trigger event; storing a time stamp with each trigger event; and generating a histogram based on the time stamps stored, the histogram providing number of trigger events versus time. Further, a signal analysis device for analyzing a signal is described.
Claims
1. A method of analyzing a signal, the method comprising: setting a trigger condition to be applied; applying the trigger condition; acquiring at least two acquisitions associated with the input signal, each acquisition comprising a trigger event that matches the trigger condition set; determining a trigger time for each trigger event; storing a time stamp with each trigger event; and generating a histogram based on the time stamps stored, the histogram providing number of trigger events versus time.
2. The method according to claim 1, wherein the histogram is displayed.
3. The method according to claim 1, wherein a certain number of trigger events is grouped within a predetermined bin of the histogram.
4. The method according to claim 3, wherein the predetermined histogram bin is associated with a predefined time span.
5. The method according to claim 1, wherein the respective bin size is changed by zooming the histogram.
6. The method according to claim 1, wherein the number of trigger events is plotted on a vertical axis of the histogram.
7. The method according to claim 1, wherein the number of trigger events is plotted in a logarithmic manner.
8. The method according to claim 1, wherein the time is plotted on a horizontal axis of the histogram.
9. The method according to claim 1, wherein the time is plotted in an absolute manner or in a relative manner with respect to a trigger event.
10. The method according to claim 1, wherein the time stamp corresponds to a time tag that provides an absolute time reference.
11. The method according to claim 1, wherein at least one bin is selected, thereby providing at least one of the number of acquisitions associated with the at least one bin selected and the time stamp associated with the at least one bin selected.
12. A signal analysis device for analyzing a signal, the signal analysis device comprising an input configured to receive an input signal to be analyzed by the signal analysis device; a trigger configured to apply a trigger condition set; an acquisition circuit configured to acquire at least two acquisitions associated with the input signal, each acquisition comprising a trigger event that matches the trigger condition set; a timing circuit configured to determine a trigger time for each trigger event such that a time stamp with each trigger event is stored; and a processing circuit configured to generate a histogram based on the time stamps stored, wherein the histogram provides number of trigger events versus time.
13. The signal analysis device according to claim 12, wherein the input is connected with at least one of the trigger and the acquisition circuit, and wherein the trigger and the acquisition circuit are connected with each other.
14. The signal analysis device according to claim 12, wherein the timing circuit is at least connected with at least one of the trigger and the acquisition circuit such that the timing circuit is configured to obtain the trigger time for each trigger event.
15. The signal analysis device according to claim 12, wherein the signal analysis device has a display that is connected with the processing circuit in order to display the histogram.
16. The signal analysis device according to claim 12, wherein a selection input is provided via which an operator is enabled to select at least one bin, and wherein the processing circuit is configured to determine at least one of the number of acquisitions associated with the at least one bin selected via the selection input and the time stamp associated with the at least one bin selected via the selection input.
17. The signal analysis device according to claim 12, wherein the signal analysis device is a real-time signal analysis device that has zero dead time.
18. The signal analysis device according to claim 12, wherein the signal analysis device is an oscilloscope, a signal analyzer or a spectrum analyzer.
Description
DESCRIPTION OF THE DRAWINGS
[0047] The foregoing aspects and many of the attendant advantages of the claimed subject matter will become more readily appreciated as the same become better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein:
[0048]
[0049]
DETAILED DESCRIPTION
[0050] The detailed description set forth below in connection with the appended drawings, where like numerals reference like elements, is intended as a description of various embodiments of the disclosed subject matter and is not intended to represent the only embodiments. Each embodiment described in this disclosure is provided merely as an example or illustration and should not be construed as preferred or advantageous over other embodiments. The illustrative examples provided herein are not intended to be exhaustive or to limit the claimed subject matter to the precise forms disclosed.
[0051]
[0052] A front end 14 is provided that comprises an input 16 via which an analog signal can be forwarded to the signal analysis device 10, which shall be analyzed by the signal analysis device 10 appropriately. The input signal may be provided by a device under test (not shown) that is probed by a probe, which can be connected with the input 16 in order to provide the input signal. Hence, the signal to be analyzed may relate to a probed signal that is associated with a signal from the device under test. In the shown embodiment, the input 16 is connected with an analog to digital converter 18 (ADC) that digitizes the analog input signal, thereby generating (digital) samples for further processing, namely analyzing purposes.
[0053] In addition, the signal analysis device 10 has a trigger, such as a trigger circuit or module 20, that is associated with the input 16 such that a trigger condition can be set via the trigger module 20 and applied on the (analog) input signal or rather the (digital) samples as indicated by the dashed lines in
[0054] Furthermore, the signal analysis device 10 comprises an acquisition circuit or module 22. The acquisition module 22 comprises an acquisition memory that is configured to acquire acquisitions associated with the input signal, for instance certain (digital) samples which are derived from the input signal.
[0055] Hence, the acquisition module 22 is connected with the input 16, for example via the analog to digital converter 18, as well as the trigger module 20 that applies the trigger condition on the input signal or rather the samples. When the respective trigger condition is met by the input signal or rather the samples, the trigger module 20 triggers the acquisition module 22 to acquire the respective samples associated therewith.
[0056] Accordingly, the acquisition module 22 does the respective acquisitions which each comprise a trigger event that matches the trigger condition set and applied by the trigger module 20.
[0057] The signal analysis device 10 also includes a timing circuit or unit 24 that may be integrated within the trigger module 20 or the acquisition module 22. Alternatively, the timing unit 24 may be formed separately. In general, the timing unit 24 is configured to determine a trigger time for each trigger event. Accordingly, the trigger module 20 or the acquisition module 22 may determine the respective trigger time.
[0058] The trigger time determined is used to provide a time stamp with each trigger event, wherein the respective time stamp is stored in the same memory as the acquisitions, namely within the acquisition module 22, or rather in a separate memory 26 as indicated by the dashed lines in
[0059] The time stamp corresponds to a time tag that provides an absolute time reference of the respective trigger event. Hence, the acquisitions can be compared with each other when referring to the time stamps since they provide an absolute indication concerning the temporal occurrence.
[0060] The signal analysis device 10 also comprises a processing circuit or module 28 that is connected with the acquisition module 22 and optionally with the separate memory 26 in case the separate memory 26 is provided.
[0061] Accordingly, the processing module 28 is enabled to access the acquisitions as well as the time stamps associated therewith. In some embodiments, the acquisitions as well as the time stamps both are associated with trigger events identified by the trigger module 20 when processing the input signal or rather the samples.
[0062] Moreover, the processing module 28 is configured to generate a histogram based on the time stamps stored as well as the acquisitions stored, namely the respective trigger events associated with the acquisitions. In some embodiments, the histogram provides number of trigger events versus time since the number of trigger events identified are illustrated over the time by the histogram.
[0063] The respective histogram is rendered or displayed on a display, such as display module 30, that is connected with the processing module 28 such that the histogram generated can be displayed appropriately for informing an operator of the signal analysis device 10.
[0064] The processing module 28 and the display module 30 may generally be configured to display a graphical user interface 32 via which the operator is enabled to control the signal analysis device 10 and/or to gather information concerning the signal analyzed. The graphical user interface 32 may provide several areas 34 that can be used to illustrate different content. For instance, the histogram 36 generated is graphically displayed within one of the several areas 34 as illustrated in
[0065] In some embodiments, the histogram 36 relates to an acquisition graph, wherein the absolute number of acquisitions or rather trigger events is displayed versus time, thereby providing information concerning the temporal characteristics of the input signal with respect to the trigger condition applied by the trigger module 20.
[0066] However, the number of acquisition or rather trigger events may also be provided in relative numbers, for instance ratios.
[0067] Generally, a certain number of trigger events acquired is grouped within a predetermined bin of the histogram 36. The trigger events are grouped or rather classified by a certain parameter such that these trigger events are provided collectively within respective bins. Typically, the respective parameter used for grouping relates to time. Hence, the bins are set by the respective parameter, namely the time, such that the trigger events associated with a certain time range are grouped within one bin. In other words, the predetermined histogram bin is associated with a predefined time span, for instance a time span of 1 second or 2 seconds.
[0068] In the shown embodiment, several bins A-G of the histogram 36 are shown that have varying numbers of acquisitions or rather trigger events as the respective heights of the bins A-G illustrate.
[0069] In the shown embodiment, the number of acquisitions is plotted on the vertical axis, namely the y-axis, whereas the time is plotted on the horizontal axis, namely the x-axis.
[0070] In some embodiments, the number of trigger events is plotted in a logarithmic manner, namely on a logarithmic scale, whereas the time may be plotted in a linear manner, namely on a linear scale. The time may be plotted in an absolute manner such that the x-axis can divided into portions with equal length, which relate to equal time spans.
[0071] As shown in
[0072] Alternatively, the time may be plotted in a relative manner with respect to a trigger event such that portions of the input signal without any trigger event can be skipped.
[0073] In
[0074] The operator is enabled to use the selection module 38 in order to select at least one of the several bins A-G illustrated in the histogram 36, thereby causing the processing module 28 to determine the number of acquisitions associated with the bin selected and/or the time stamp associated with the bin selected. In other words, the value associated with the y-axis and/or the value associated with the x-axis are provided accordingly. The respective value(s) may be displayed by the display module 30 in order to inform the operator accordingly.
[0075] Alternatively, the display module 30 may be established in a touch-sensitive manner such that the selection module 38 is integrated within the display module 30. Thus, the operator can directly interact with the display module 30 in order to select one of the respective bins A-G in order to retrieve more information concerning the bin selected.
[0076] Moreover, the signal analysis device 10 generally provides a zoom functionality such that the operator is enabled to provide a zooming in of the histogram 36 or rather a zooming out of the histogram 36, thereby changing the respective bin size of the bins illustrated.
[0077] The zooming in relates to splitting at least one of the several bins into more than one bin since the time span associated with the bins is reduced. For instance, each bin is initially associated with a time span of 2 seconds, wherein a first zoom-in level results in time spans of 1 second associated with each bin.
[0078] The zooming out relates to combining several bins initially provided into one bin since the time span associated with the bins is increased. According to an example, each bin is initially associated with a time span of 2 seconds, wherein a first zoom-out level results in time spans of 4 seconds associated with each bin.
[0079] Accordingly, the operator of the signal analysis device 10 is enabled to adapt the histogram 36, for example the illustration of the data provided by the histogram 36, according to his needs in order to get a better overview or rather a deeper insight into a certain area of the input signal that is of interest.
[0080] In general, the signal analysis device 10 is a real-time signal analysis device that has zero dead time, for example an oscilloscope, a signal analyzer or a spectrum analyzer.
[0081] Certain embodiments disclosed herein utilize circuitry (e.g., one or more circuits) in order to implement standards, protocols, methodologies or technologies disclosed herein, operably couple two or more components, generate information, process information, analyze information, generate signals, encode/decode signals, convert signals, transmit and/or receive signals, control other devices, etc. Circuitry of any type can be used. It will be appreciated that the term “information” can be use synonymously with the term “signals” in this paragraph.
[0082] In an embodiment, circuitry includes, among other things, one or more computing devices such as a processor (e.g., a microprocessor), a central processing unit (CPU), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a system on a chip (SoC), or the like, or any combinations thereof, and can include discrete digital or analog circuit elements or electronics, or combinations thereof. In an embodiment, circuitry includes hardware circuit implementations (e.g., implementations in analog circuitry, implementations in digital circuitry, and the like, and combinations thereof).
[0083] In an embodiment, circuitry includes combinations of circuits and computer program products having software or firmware instructions stored on one or more computer readable memories that work together to cause a device to perform one or more protocols, methodologies or technologies described herein. In an embodiment, circuitry includes circuits, such as, for example, microprocessors or portions of microprocessor, that require software, firmware, and the like for operation. In an embodiment, circuitry includes one or more processors or portions thereof and accompanying software, firmware, hardware, and the like.
[0084] In some examples, the functionality described herein can be implemented by special purpose hardware-based computer systems or circuits, etc., or combinations of special purpose hardware and computer instructions.
[0085] The present application may reference quantities and numbers. Unless specifically stated, such quantities and numbers are not to be considered restrictive, but exemplary of the possible quantities or numbers associated with the present application. Also in this regard, the present application may use the term “plurality” to reference a quantity or number. In this regard, the term “plurality” is meant to be any number that is more than one, for example, two, three, four, five, etc. The terms “about,” “approximately,” “near,” etc., mean plus or minus 5% of the stated value. For the purposes of the present disclosure, the phrase “at least one of A and B” is equivalent to “A and/or B” or vice versa, namely “A” alone, “B” alone or “A and B.”. Similarly, the phrase “at least one of A, B, and C,” for example, means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C), including all further possible permutations when greater than three elements are listed.
[0086] The principles, representative embodiments, and modes of operation of the present disclosure have been described in the foregoing description. However, aspects of the present disclosure which are intended to be protected are not to be construed as limited to the particular embodiments disclosed. Further, the embodiments described herein are to be regarded as illustrative rather than restrictive. It will be appreciated that variations and changes may be made by others, and equivalents employed, without departing from the spirit of the present disclosure. Accordingly, it is expressly intended that all such variations, changes, and equivalents fall within the spirit and scope of the present disclosure, as claimed.