Abstract
The present patent application relates to a method and equipment for eliminating harmonics based on two complementary techniques, namely the elimination of harmonics by selective harmonic elimination pulse-width modulation in conjunction with the multiple-wiring transformer. The association of these two resources is capable of reducing the harmonic distortion of currents to extremely low values, providing a truly unitary power factor. The technology is suitable for low and medium intensity alternating current—direct current and direct current—alternating current converters, which make interface with the electricity network and should have low harmonic distortion of the current because of the high power value involved, and also because of fragility of the electricity network (low power of short circuit at the coupling point).
Claims
1. A method for eliminating harmonic components comprising the following steps: a) elimination of harmonic components of order h, defined by the expression h=6 k±1, by using three-winding transformer, where k={1, 3,5,7, . . . }; b) elimination of harmonic components of order h defined by the expression h=12 k±1, where k={1, 2,3,4, . . . }, through pulse-width modulation for use with selective harmonic elimination (SHE PWM).
2. Method for elimination of harmonic components, according to claim 1, steps “a” and “b”, wherein the order of harmonic components to be eliminated may be equal to or greater than 50.
3. Method for elimination of harmonic components in accordance with claim 1, step “b”, wherein the type of pulse-width modulation with selective harmonic elimination (SHE PWM) is preferably 9 pulses.
4. Equipment for elimination of harmonic components comprises a multiple winding transformer composed of a primary winding (2), at least one pair of secondary windings, a configured delta connection (3) and the other in the star connection (4); and each secondary winding is individually connected to a converter (6) switched by means of pulse-width modulation with selective elimination of harmonics.
5. Equipment for elimination of harmonic components, according to claim 4, characterized in that it may contain multiple pairs of secondary windings (3) and (4) linked to multiple converters (6) repetitions of the basic setting unit includes the pair of windings side (3) and (4) and the inverters individually connected to these windings.
6. Equipment for elimination of harmonic components, according to claim 4, characterized in that it contains a multiple transformer windings, preferably two secondary windings.
7. Equipment for removing harmonic components, according to claim 4, characterized by the converters can be associated in series and in parallel.
8. Equipment for elimination of harmonic components, according to claim 4, characterized by the converters can be NPC multilevel types ANPC, NPP, Vienna converter, lift inverter with forced switching.
Description
BRIEF DESCRIPTION OF THE FIGURES
[0019] FIG. 1—FIG. 1 shows the generic topology of the converter proposed and its basic elements: a conventional three-wiring transformer (2), (3) and (4) with connections Dd0y1 or Dd0y11 (according to IEC 60076-1) having its primary (2) connected to the electrical network (1) and each of its secondary (3) and (4) connected to a converter (6) switching through the 9-pulse SHE PWM method. The output in direct current of the converters may be kept at individual bars FIG. 1(b) to enable a parallel connection of the converters on the side of the charge and thus greater current available, or be connected in series FIG. 1(a) to obtain a higher voltage value on the direct-current bar.
[0020] FIG. 2—FIG. 2 indicates a conventional two-level converter with converting or inverting operation capacity.
[0021] FIG. 3—FIGS. 3 indicates a phase representation of the NPC three-level converter topology with operation capacity in four quadrants.
[0022] FIG. 4—FIG. 4 indicates a phase representation of the ANPC three-level converter with operation capacity in four quadrants.
[0023] FIG. 5—FIG. 5 indicates a phase representation of the NPP three-level converter with operation capacity in four quadrants.
[0024] FIG. 6—FIG. 6 indicates a phase representation of the Vienna converter topology, in which there is only the possibility of power flow in the converter-to-charge direction.
[0025] FIG. 7—FIG. 7 shows a phase representation of the three-level raising converter with forced commutation, in which there is only the possibility of power flow in the converter-to-charge direction,
[0026] FIG. 8—FIG. 8 shows a phase representation of the three-level converter topology in the NPC topology, in which there is only the possibility of power flow in the converter-to-charge direction.
[0027] FIG. 9—FIG. 9 shows a phase representation of the three-level converter topology, based on the NPP topology, in which there is only the possibility of power flow in the converter-to-charge direction.
[0028] FIG. 10—FIG. 10 shows two topologies, in which multi-level converters (10), (11) are used to feed a motor or generator (12) at voltages of up to 9 kVrms. The direct current bar can be connected in series, enabling one to obtain 5 voltage levels from the converter and, consequently, being possible to use a converter at 5 levels (10) on the side of the machine (FIG. 10(a)). Alternatively, the direct current bar can independently feed converters at 3 levels (11), which feed a machine with the 6 accessible terminals of the coil (FIG. 10(b).
[0029] FIG. 11—FIG. 11 shows the simulation data for a two-level converter. The simulated data are related to a phase, represented in the figure as phase A. In the first graph, on the ordinate axis, the voltage is represented at Volts, switched by the converter, evidenced by the pulses in square wave; the sinusoidal reference associated to the pulses resulting from the PWM modulation is represented in the same graph; the time in seconds is represented on the abscissa axis. The harmonic spectrum resulting from the voltage switched by the converter is represented in the second graph; the voltage of the harmonics expressed as a percent value with respect to the amplitude of the voltage of the fundamental component is represented on the ordinate axis; the order of the harmonics is represented on the abscissa axis.
[0030] FIG. 12—FIG. 12 shows the simulation data for a two-level converter. The simulated data are related to a phase, represented in the figure as phase A. In the first graph, the current on the secondary wiring of the transformer in Amperes is represented on the ordinate axis; the time in seconds is represented on the abscissa axis. The harmonic spectrum associated to the current that circulates in the secondary wiring of the transformer is represented in the second graph. The current intensity of each harmonic expressed as a percentage value with respect to the amplitude of the current of the fundamental component is represented on the ordinate axis; The order of the harmonics is represented on the abscissa axis.
[0031] FIG. 13—FIG. 13 shows the simulation data for a two-level converter. The simulated data are related to a phase, represented in the figure as phase A. In the first graph, the current on the primary wiring of the transformer in Amperes, reflected from the secondary wiring (primary and secondary in Delta connection) is represented on the ordinate axis; the time in seconds is represented on the abscissa axis. In the second graph, the current in the primary wiring of the converter in Amperes, reflected from the secondary wiring (primary in delta and secondary in star) is represented on the ordinate axis; the time in seconds is represented on the abscissa axis. In the third graph, one represents the total current in the primary wiring of the converter in Amperes, reflected from the two secondary wirings, is represented on the ordinate axis; the time in second is represented on the abscissa axis.
[0032] FIG. 14—FIG. 14 shows the simulation data for a two-level converter. The simulated data relates to a phase, represented in the figure as phase A. The harmonic spectrum associated to the total current that circulates on the primary wiring of the transformer in Ampere is represented in the graph; The current intensity of each harmonic, expressed as a percentage value, with respect to the amplitude of the current of the fundamental component is represented on the ordinate axis; The order of the harmonics is represented on the abscissa axis. The total harmonic distortion of the current that circulates through the primary wiring of the transformer equal to 0.582% is indicated in the graph.
[0033] FIG. 15—FIG. 15 shows the simulation data for a three-level converter. The simulated data relates to a phase, represented in the figure as phase A. In the first graph, the voltage in Volts, switched by the converter, evidenced by the pulses in square wave is represented on the ordinate axis; The sinusoidal reference associated to the pulses resulting from the PWM modulation is represented in the same graph; the time in seconds is represented on the abscissa axis. The harmonic spectrum resulting from the voltage switched by the converter is represented in the second graph; The voltage of the harmonics expressed as a percentage value with respect to the amplitude of the voltage of the fundamental components is represented on the ordinate axis; the order of the harmonics is represented on the abscissa axis.
[0034] FIG. 16—FIG. 6 shows the simulation data for a three-level converter. The simulated data relates a phase, represented in the figure as phase A, In the first graph, the current on the secondary wiring of the transformer in Ampères is represented on the ordinate axis; the time in seconds is represented on the abscissa axis. The harmonic spectrum associated to the current that circulates in the second wiring of the transformer is represented in the second graph; the current intensity of each harmonic component expressed as a percentage value with respect to the amplitude of the current of the fundamental component is represented on the ordinate axis; the order of the harmonics is represented on the abscissa axis.
[0035] FIG. 17—FIG. 17 shows the simulation data for a three-level converter. The simulated data relates to a phase, represented in the figure as phase A. In the first, graph, the current on the primary wiring of the transformer in Amperes, reflected from the secondary wiring (primary and second Delta connection) is represented on the ordinate axis; the time in seconds is represented on the abscissa axis. In the second graph, the current on the primary wiring of the transformer in Ampères, reflected from the secondary wiring (primary in delta and secondary in star) is represented on the ordinate axis; the time in seconds is represented on the abscissa axis. In the second graph, the total current on the primary wiring of the transformer in Ampère, reflected from the two secondary wirings is represented on the ordinate axis; the time in seconds is represented on the abscissa axis.
[0036] FIG. 18—FIG. 18 shows the simulation data for a three-level converter. The simulated data relates to a phase, represented in the figure as phase A. The harmonic spectrum associated to the total current that circulates on the primary wiring of the transformer in Ampères is represented in the graph; the current intensity of each harmonic component expressed as a percentage value with respect to the amplitude of the current of the fundamental component is represented on the ordinate axis; the order of the harmonic components is represented on the abscissa axis. The total harmonic distortion of the current that circulates through the primary wiring of the transformer equal to 0.1% is indicated in the graph.
DETAILED DESCRIPTION OF THE TECHNOLOGY
[0037] The present technology involves a method and a piece of equipment to eliminate harmonics,
[0038] The method for elimination of harmonics comprises the following steps: [0039] a) eliminating harmonics of the h order, defined by the expression h=6 k +/−1, by using three-wiring transformers, wherein k={1,3,5,7 . . . }; [0040] b) eliminating harmonics of h order, defined by the expression h=12 k+/−1, wherein k={1,2,3,4, . . . }, y using selective harmonic elimination pulse-width modulation (SHE PWM).
[0041] The order of harmonics to be eliminated at steps “a′ and “b” may be equal to or higher than 50. At step “b” the most indicated SHE PWM type of modulation is that of 9 pulses.
[0042] The proposed equipment is a converter capable of eliminating harmonics and operating with unitary power factor. The functioning characteristics presented are achieved by means of the method described above, which uses two complementary strategies, namely selective harmonic elimination by pulse-width modulation associated to the use of a multiple wiring transformer. The non-limiting generic topology of the device is presented in FIG. 1. The equipment comprises a multiple wiring transformer composed by primary wiring (2), at least one pair of secondary wirings, one configured delta connection (3) and the other configured in star (4); wherein each secondary wiring is connected individually to a converter (6) switched by means of pulse-width modulation with selective harmonic elimination. The proposed equipment may contain multiple pairs of secondary wiring (3), and (4) connected to multiple converters (6), configuring repetitions of the basic unit, which includes a pair of secondary wirings (3) and (4) and the converters connected individually to these wirings.
[0043] The reduction of the number of harmonics produced occurs by using multiple-wiring transformers, wherein each wiring feeds a converter, and the angular off-phase between the wirings is chosen so that in the primary wiring an elimination of harmonics is obtained. In this way, the number of secondary wirings defines how many harmonics will be eliminated. A single three-phase three-wiring transformer (Delta-delta-star), for example, generates the necessary off-phase (30°) between its wirings so as to have in the primary one only the harmonics of the h order (defined by the expression h=12 k +/−1, wherein k={1, 2, 3 . . . }). The obtainment of the sinusoidal current on the first primary wiring of the transformer (free from harmonics up to the order 50) also takes place due to the fact that the converters in question have the SHE PWM angles calculated so as to eliminate the harmonics that are not eliminated by the connection of the transformer itself, which are those of the h order (defined by the expression h=12 k +/−1, wherein k={1,2,3,4 . . . }), by using pulse-width modulation with selective harmonic elimination (SHE PWM), as indicated in Table 1, which shows the values of harmonics to be eliminated in that case where the number of wirings of the transformer is equal to three. The even pairs are not characteristics due to the symmetry of one fourth of wave and the triple harmonics are cancelled between phases due to three-wire three-phase connection.
TABLE-US-00001 TABLE 1 orders of the harmonics eliminated by each element. Harmonics to be eliminated Element (order) Transformer 5, 7, 17, 19, 29, 31, 41, 43 (three wirings) Convert (SHE 11, 13, 23, 25, 35, 37, 47, 49 PWM, nine pulses)
[0044] The output of the direct current of the converters may be kept on individual bars (FIG. 1(b)) to enable a parallel connection of the converters on the charge side and so to obtain greater current available, and it may also be connected in series to obtain a higher voltage value on the direct-current bar (FIG. 1(a)). The voltage and current measurements necessary to the synchronism with the network and to the control of the converter may be take on both the primary side (preferable) and the secondary ones.
[0045] The converters (6) may have different topologies according to the levels of voltage and current involved in the commutation and blockage of the switches, as well as the need or no need for bidirectional power flow. FIGS. 2-9 indicate the multilevel topologies that may be adopted for the converters, and may be of the types: NPC, ANPC, NPP, Vienna Converter, raising Converter with forced commutation.
[0046] FIG. 2 indicates a conventional two-level converter with converting or inversing operation capacity. The other figures indicate three-level topologies, wherein the topologies presented in FIGS. 3-5 indicate the converters NPC, ANPC and NPP, respectively. All these also with operation capacity in four quadrants. On the other hand, FIGS. 6-9 indicate the possible three-level topologies, wherein there is only the need for power flow in the converter-to-charge direction and, therefore, the number of active switches may be reduced.
[0047] FIG. 10 shows an application of the method proposed herein in a preferred configuration of the converter, wherein it is implemented with a transformer with two secondary wirings (3) and (4), three-level converters (6) (FIGS. 3-5 and 7-8) for elimination of a motor (12) or generator (12) on voltages on the order of up to 9 kVrms. The direct-current bar may be connected in series, enabling one to obtain five voltage levels (10) from the converter and, as a result, it is possible to use a inverter at 5 levels on the machine side (FIG. 10(a)), or the direct-current bars can feed, in an independent way, converters at 3 levels (11), which feed a machine with the six accessible terminals of the coil (FIG. 10(b)). This is the less complex configuration of the equipment, since it uses the smaller number of transformer wirings and, therefore, is economically interesting and reliable.
[0048] The invention can be better understood through the use of examples, including but not limited to:
EXAMPLE 1
Results of the Simulations Carried Out
[0049] Results of the simulations carried out by using the tools Simulink® of the MATLAB® for both a low-voltage system by applying two-level converters (data of the simulated system in table 2) and a medium-voltage application by using three-level converters (data of the simulated system in table 3). The transformer used in the simulation is composed of three wirings.
TABLE-US-00002 TABLE 2 Data of the low-voltage simulated system by applying two-level converters. Element/Variable Simulation Value Network voltage [Vrms] 13800 Voltage of the secondary [Vrms] 440 Network frequency [Hz] 60 Input inductance [mH] 0.5 Type of SHE PWM [pulses] 9 Current reference Id [A] −370* Current reference Iq [A] 0* *referring to each secondary
TABLE-US-00003 TABLE 3 Data of the medium-voltage simulated system applying three-level converters. Element/Variable Simulation Value Network voltage [Vrms- 13800 Voltage of the secondary [Vrms] 4160 Network frequency [Hz] 60 Input inductance [mH] 4 Type of SHE PWM [pulses] 9 Current reference Id [A] −207* Current reference Iq [A] 0* *referring to each secondary
[0050] The results achieved from the simulations are arranged in graphs. In FIGS. 11-14 are the results for the simulation of two-level converter, including the voltage waves (and harmonic spectrum) switched by the converter, the current (and spectrum) on the second transformer, the currents of the secondary reflected to the primary and the current resulting on the primary, and the harmonic spectrum of the current on the primary of the transformer, respectively. FIGS. 15-18 indicate the same results for the case of using three-level converters.
[0051] In all the results one can observe that, although the currents are highly distorted on the secondary wirings of the transformer, the selective elimination in conjunction with the three-wiring transformer was capable of producing an extremely low total harmonic distortion of current on the primary (calculated up to 50° harmonic). These THD applied in equation [3] result in a truly unitary power factor. This has been achieved with converters whose switching frequencies were 1140 Hz for two-level converters and of 1080 Hz (540 Hz per switch) in the case of three-level converters.
