Modification of electrical properties of topological insulators
09748345 · 2017-08-29
Assignee
Inventors
Cpc classification
H01L29/24
ELECTRICITY
H01L21/477
ELECTRICITY
H01L21/385
ELECTRICITY
International classification
H01L29/24
ELECTRICITY
H01L21/385
ELECTRICITY
H01L21/477
ELECTRICITY
Abstract
Ion implantation or deposition can be used to modify the bulk electrical properties of topological insulators. More particularly, ion implantation or deposition can be used to compensate for the non-zero bulk conductivity due to extrinsic charge carriers. The direct implantation of deposition/annealing of dopants allows better control over carrier concentrations for the purposes of achieving low bulk conductivity. Ion implantation or deposition enables the fabrication of inhomogeneously doped structures, enabling new types of device designs.
Claims
1. A method to modify the electrical properties of a topological insulator, comprising: providing a topological insulator having finite bulk conductivity due to bulk charge carriers; and ion implanting the topological insulator with a dopant that compensates for the bulk charge carriers.
2. The method of claim 1, wherein the bulk charge carriers comprise n-type charge carriers and the dopant comprises a p-type dopant.
3. The method of claim 2, wherein the topological insulator comprises Bi.sub.2Se.sub.3 and the p-type dopant comprises Ca.
4. The method of claim 1, wherein the bulk charge carriers comprise p-type charge carriers and the dopant comprises an n-type dopant.
5. The method of claim 1, wherein the topological insulator comprises a semimetal.
6. The method of claim 5, wherein the semimetal comprises bismuth, antimony, lead, tin, germanium, or thallium.
7. The method of claim 5, wherein the topological insulator comprises semimetal chalcogenide.
8. The method of claim 7, wherein the semimetal chalcogenide comprises selenium, tellurium, or sulfur.
9. The method of claim 1, wherein the topological insulator comprises bismuth selenide, bismuth telluride, antimony telluride, or bismuth antimony tellurium selenide.
10. The method of claim 1, wherein the ion implantation dose is greater than 5×10.sup.13 cm.sup.−2 and less than 10.sup.20 cm.sup.−2.
11. The method of claim 1, further comprising annealing the ion-implanted topological insulator.
12. The method of claim 1, wherein the topological insulator is inhomogeneously doped.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The detailed description will refer to the following drawings, wherein like elements are referred to by like numbers.
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DETAILED DESCRIPTION OF THE INVENTION
(9) The present invention uses ion implantation and deposition to modify the bulk or near-surface electrical properties of topological insulators. More particularly, ion implantation and deposition are used to compensate for the non-zero bulk conductivity due to extrinsic charge carriers. As examples of the invention, ion implantation was used as an alternative method for the p-type doping of Bi.sub.2Se.sub.3 and deposition was used to form a p-n junction in Bi.sub.2Se.sub.3. Although p-type Bi.sub.2Se.sub.3 has been synthesized using bulk synthesis methods, ion implantation allows more precise control over the number and spatial distribution of dopants. See Y. S. Hor et al., Physical Review B 79(19), 195208 (2009). This is important in the context of topological insulators for two reasons. Direct implantation of dopants enables a higher degree of control over carrier concentration in topological insulators for the purposes of achieving low bulk conductivity, beyond what has been achieved using bulk or thin film processes. This higher degree of control is possible through the control of the ion beam current. Inhomogeneously doped device structures can be fabricated in topological insulators using a combination of lithography and ion implantation. If type conversion can be achieved, planar p-n junctions can be formed. The existence of a p-n junction implies a space charge region in which there is no bulk conduction. This is an alternative method for reducing bulk conduction in topological insulators. Ion implantation has been used to fabricate integrated circuits for these reasons. See J. S. Williams, Materials Science and Engineering: A 253 (1-2), 8 (1998). Advanced integrated devices based on topological insulators are thus possible using ion implantation and deposition.
(10) The feasibility of ion implantation was demonstrated through two sets of experiments. First, the extent of structural damage caused by Ca ion implantation in Bi.sub.2Se.sub.3 wafers was shown using grazing incidence X-ray diffraction (GIXRD) and transmission electron microscopy (TEM). Ion beam damage was removed using a low temperature annealing step. Second, ion implantation was used to convert native n-type Bi.sub.2Se.sub.3 films to p-type using Ca ions. An annealing step is required to activate implanted Ca ions. Bi.sub.2Se.sub.3 is only used as an example material to demonstrate the invention. Ion implantation can in principle be used for charge compensation or inhomogeneous doping of any topological insulator.
(11) Ion implantation of Ca was performed at 200 keV at nominal doses from ˜10.sup.13-10.sup.17 cm.sup.−2. Single-sided polished Bi.sub.2Se.sub.3 wafers with large ˜mm sized grains were synthesized using an established melt growth procedure and directly placed in the implantation chamber and used for GIXRD and TEM measurements. See Y. S. Hor et al., Physical Review B 79(19), 195208 (2009). Bi.sub.2Se.sub.3 films, of 256 nm thickness grown on sapphire (0001) substrates via molecular beam epitaxy using a previously reported method, were first coated with 100 nm of sputtered Al.sub.2O.sub.3 before implantation to mitigate ion beam damage and prevent the loss of Se during annealing. See Namrata Bansal et al., Physical Review Letters 109(11), 116804 (2012). Films were used for assessing changes in carrier concentration with Ca implantation. SRIM simulations were performed to estimate the dopant distribution for implantation into wafers and films with an Al.sub.2O.sub.3 layer. See J. F. Ziegler et al., SRIM, the stopping and range of ions in matter (SRIM Company, 2008).
(12) Secondary ion mass spectrometry (SIMS) was performed to validate SRIM simulations. The end of range for 200 keV Ca is ˜150 nm with a straggle of ˜100 nm. Implantation of Ca was chosen since this is the simplest p-type dopant in Bi.sub.2Se.sub.3. See Y. S. Hor et al., Physical Review B 79(19), 195208 (2009). Exfoliated flakes were transferred to TEM grids. Bi.sub.2Se.sub.3 ingot material was initially mechanically cleaved into small pieces along the basal planes. These pieces were then exfoliated using scotch tape until a very thin portion of Bi.sub.2Se.sub.3 was formed. The tape was pressed onto a cleaned silicon wafer with a thermally grown oxide of 90 nm. The tape was removed, which resulted in the transfer of some Bi.sub.2Se.sub.3 flakes. TEM grids with a flexible carbon support film were then stuck to the wafer surface by dropping isopropanol on the grids and allowing it to dry. Dilute hydrofluoric acid (3% in deionized water) was then dropped on top of the TEM grids, which etched the surface oxide of the wafer but left the TEM grids and Bi.sub.2Se.sub.3 flakes unaffected. The grids were released during this process and rinsed with water before TEM analysis. This method produced variable thickness Bi.sub.2Se.sub.3 flakes, many of which were electron transparent, with few defects. TEM grids with Bi.sub.2Se.sub.3 flakes were placed directly in the implanter. The same regions of specimen were characterized by TEM both before and after implantation. AC resistance measurements were used to measure the Hall resistance.
(13) The first potential challenge involved with ion implantation is the introduction of amorphous regions due to ion damage. Topological insulator surface transport phenomena are only expected to occur in the presence of a crystalline lattice. GIXRD was used to assess the crystallinity of implanted wafers in the near surface Ca implanted region. The grazing incidence geometry allows one to examine structural variations as a function of depth by precisely controlling incident angle and therefore the penetration depth of X-rays. See J. Daillant and M. Alba, Reports on Progress in Physics 63(10), 1725 (2000). A PANalytical Empyrean system was used with a PIXcel3D detector using monochromatic copper Ka radiation (λ=1.5406 Å) at 45 kV and 40 mA. Detector scans were performed at various fixed grazing angles. The inter-planar spacings of the crystal structure were determined from the GIXRD measurements. The samples were placed at an appropriate angle to the source so that the X-rays exhibit grazing incidence with the surface and then the PIXcel3D detector was physically rotated through an angle of 2θ relative to the sample. The grazing incidence angle was subtracted from the data to yield intensity versus 2θ. GIXRD patterns were then interpreted as standard θ-2θ powder X-ray diffraction patterns at different penetration depths, corresponding to different grazing incident angles.
(14) The GIXRD measurements are shown in
(15) TEM experiments were conducted in order to assess ion damage and the possible presence of structural damage below the spatial resolution of X-ray diffraction.
(16) For the irradiated samples shown in
(17) In the second set of experiments, it was demonstrated that ion implantation can be used to introduce charge carriers into Bi.sub.2Se.sub.3. Thin films with thickness of 256 nm were used to measure the sign and concentration of charge carriers after ion implantation. Implantation of Ca ions followed by a low temperature annealing step converted native n-type Bi.sub.2Se.sub.3 films (carrier concentration ˜10.sup.18 cm.sup.−3) into p-type at a dose of 8×10.sup.14 cm.sup.−2. In
(18) Hall effect and resistivity measurements were repeated as a function of temperature down to 15 K, as shown in
(19) Finally, the resistivity, measured using the Van der Pauw method and normalized to the room temperature value, for the as prepared, as implanted, and annealed samples is shown in
(20) Ca implantation doses an order of magnitude higher and lower than ˜8×10.sup.14 cm.sup.−2 did not result in p-type conduction under the present experimental conditions. There is clearly a balance between the generation of n-type Se vacancies and the incorporation of p-type Ca dopants during implantation. This balance is probably a complicated function of dose, energy, annealing conditions, and encapsulation methods. However, the feasibility of ion implantation has been shown through two metrics: (1) the characterization of ion beam induced damage at different length scales, and (2) type conversion for a particular dose. Ion implantation can be used for compensation doping of Bi.sub.2Se.sub.3 and any of the chalcogenide topological insulator materials due to their chemical similarity. Inhomogeneously doped device structures can be fabricated in topological insulators using a combination of lithography and ion implantation. If type conversion can be achieved, planar p-n junctions can be formed. The existence of a p-n junction implies a space charge region in which there is no bulk conduction. This is an alternative method for reducing bulk conduction in topological insulators. Ion implantation has been used to fabricate integrated circuits for these reasons. See J. S. Williams, Materials Science and Engineering: A 253 (1-2), 8 (1998). Advanced integrated devices based on topological insulators are thus possible using ion implantation.
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(24) The present invention has been described as a method for modification of electrical properties of topological insulators. It will be understood that the above description is merely illustrative of the applications of the principles of the present invention, the scope of which is to be determined by the claims viewed in light of the specification. Other variants and modifications of the invention will be apparent to those of skill in the art.