Abstract
An electronic device may be configured to identify a load coupled to the device. The device may measure direct current (DC) and/or alternating current (AC) characteristics of the load to identify the load. The device may then take action based on the identification of the load. For example, a specific transducer may be identified as coupled to the electronic device and an appropriate equalization curve applied to an audio output of the device. The measurement of characteristics of the load may include controlling a reference generator according to a search algorithm, such as a step ramp or binary search, to identify the load. An analog-to-digital converter (ADC) may operate through the search algorithm to provide feedback to digital circuitry regarding how to proceed through the search algorithm to identify the load.
Claims
1. An apparatus, comprising: a first output node configured to couple to a load; a first digital-to-analog converter (DAC) coupled to the first output node; sense circuitry coupled to the first output node; a reference generator; a second digital-to-analog converter (DAC) coupled to the reference generator; an analog-to-digital converter (ADC) coupled to the sense circuitry and coupled to the reference generator; and digital circuitry coupled to the first digital-to-analog converter (DAC) and coupled to the second digital-to-analog converter (DAC) and coupled to the analog-to-digital converter (ADC) and configured to control at least one of the first digital-to-analog converter (DAC) and the second digital-to-analog converter (DAC) to identify the load.
2. The apparatus of claim 1, wherein the digital circuitry is configured to identify the load based on a determined impedance of the load.
3. The apparatus of claim 1, wherein the digital circuitry is configured to control at least one of the first digital-to-analog converter (DAC) and the second digital-to-analog converter (DAC) based on a search algorithm to identify the load.
4. The apparatus of claim 3, wherein the search algorithm comprises a binary search.
5. The apparatus of claim 3, wherein the search algorithm comprises a step ramp search.
6. The apparatus of claim 1, wherein the digital circuitry is configured: to operate the first digital-to-analog (DAC) to generate a direct current (DC) signal at the first output node, wherein the analog-to-digital converter (ADC) is configured to generate an output digital signal based, at least in part, on a sensed value measured by the sense circuitry; to operate the second digital-to-analog (DAC) to generate, by the reference generator, a reference input for the analog-to-digital converter (ADC), wherein the analog-to-digital converter (ADC) is configured to generate the output digital signal based, at least in part, on the reference input; and to monitor an output of the analog-to-digital converter (ADC) to determine a DC impedance of the load.
7. The apparatus of claim 6, wherein the load is a transducer for reproducing audio, and wherein the digital circuitry is configured to identify the transducer based, at least in part, on the determined DC impedance of the load.
8. The apparatus of claim 1, wherein the digital circuitry is further configured: to operate the first digital-to-analog (DAC) to generate an alternating current (AC) signal at the first output node, wherein the analog-to-digital converter (ADC) is configured to generate an output digital signal based, at least in part, on a sensed value measured by the sense circuitry; to operate the second digital-to-analog (DAC) to generate, by the reference generator, a reference input for the analog-to-digital converter (ADC), wherein the analog-to-digital converter (ADC) is configured to generate the output digital signal based, at least in part, on the reference input; and to monitor an output of the analog-to-digital converter (ADC) to determine an AC frequency response of the load.
9. The apparatus of claim 8, wherein the load is a transducer for reproducing audio, and wherein the digital circuitry is configured to identify the transducer based, at least in part, on the determined AC frequency response of the load.
10. The apparatus of claim 1, wherein the first digital-to-analog converter (DAC) is configured to perform a load characteristic measurement during a first time period and is configured to provide an audio signal output to the first output node during a second time period.
11. An apparatus, comprising: digital circuitry configured to determine at least one characteristic of a load, wherein the digital circuitry is configured to perform the steps of: applying a first signal to a load using a first digital-to-analog controller (DAC); determining a characteristic of the load based on the applied first signal; applying a second signal to a reference generator using a second digital-to-analog controller (DAC); determining a characteristic of the reference generator in response to the applied second signal; comparing the determined characteristics of the load and of the reference generator; and identifying the load based on the compared characteristics of the load and of the reference generator.
12. The apparatus of claim 11, further comprising the step of adjusting at least one of the first signal and the second signal based on the comparing of the determined characteristics of the load and of the reference generator, wherein the step of identifying the load is based on the adjusting of the at least one of the first signal and the second signal.
13. The apparatus of claim 12, wherein the digital circuitry is configured to apply a direct current (DC) signal from the first digital-to-analog converter (DAC) and to determine a DC impedance of the load to identify the load.
14. The apparatus of claim 13, wherein the digital circuitry is further configured to perform steps comprising adjusting the second signal applied from the second digital-to-analog converter (DAC) to the reference load, wherein the adjustment comprises part of a search algorithm to identify the load.
15. The apparatus of claim 14, wherein the search algorithm comprises a binary search.
16. The apparatus of claim 14, wherein the search algorithm comprises a step ramp search.
17. The apparatus of claim 11, wherein the digital circuitry is configured to control the first digital-to-analog converter (DAC) to apply an alternating current (AC) signal as the first signal to the load to determine an AC frequency response of the load.
18. The apparatus of claim 17, wherein the load is a transducer for reproducing audio, and wherein the controller is configured to identify the transducer based, at least in part, on the determined AC frequency response of the load.
19. A method, comprising: applying a first signal to a load from a first digital-to-analog converter (DAC); determining a characteristic of the load based on the applied first signal; applying a second signal to a reference generator from a second digital-to-analog converter (DAC); determining a characteristic of the reference generator in response to the applied second signal; comparing the determined characteristics of the load and of the reference generator; and identifying the load based on the compared characteristics of the load and of the reference generator.
20. The method of claim 19, further comprising the step of adjusting at least one of the first signal and the second signal based on the comparing of the determined characteristics of the load and of the reference generator, wherein the step of identifying the load is based on the adjusting of the at least one of the first signal and the second signal.
21. The method of claim 20, wherein the step of applying the first signal comprises applying a direct current (DC) signal from the first digital-to-analog converter (DAC), wherein the step of identifying the load comprises determining a DC impedance of the load to identify the load.
22. The method of claim 21, further comprising adjusting the second signal applied from the second digital-to-analog converter (DAC) to the reference load, wherein the adjusting comprises part of a search algorithm to identify the load.
23. The method of claim 22, wherein the search algorithm comprises a binary search.
24. The method of claim 22, wherein the search algorithm comprises a step ramp search.
25. The method of claim 19, wherein the step of applying the first signal comprises applying an alternating current (AC) signal from the first digital-to-analog converter (DAC), wherein the step of identifying the load comprises determining an AC frequency response of the load to identify the load.
26. The method of claim 25, wherein the load is a transducer for reproducing audio, and wherein the step of identifying the transducer is based, at least in part, on the determined AC frequency response of the load, and wherein the method further comprises adjusting an output to the transducer based, at least in part, on an identification of the transducer.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0027] For a more complete understanding of the disclosed system and methods, reference is now made to the following descriptions taken in conjunction with the accompanying drawings.
[0028] FIG. 1 is a drawing illustrating a conventional smartphone detecting when headphones are attached to an audio output according to the prior art.
[0029] FIG. 2A is a drawing illustrating an example portable audio device detecting load characteristics of headphones attached to an audio output according to one embodiment of the disclosure.
[0030] FIG. 2B is a flow chart illustrating an example method for identifying a load according to one embodiment of the disclosure.
[0031] FIG. 3A is an example block diagram illustrating an apparatus for identifying a load according to one embodiment of the disclosure.
[0032] FIG. 3B is an example circuit illustrating a digital-to-analog converter (DAC)-based measurement of load characteristics of headphones according to one embodiment of the disclosure.
[0033] FIG. 4 is an example flow chart illustrating a method of measuring direct current (DC) load characteristics of headphones according to one embodiment of the disclosure.
[0034] FIG. 5 is an example flow chart illustrating a method of measuring direct current (DC) load characteristics of headphones with a coarse and fine stepping according to one embodiment of the disclosure.
[0035] FIG. 6 is an example flow chart illustrating a method of measuring direct current (DC) load characteristics of headphones with a binary search according to one embodiment of the disclosure.
[0036] FIG. 7 is an example flow chart illustrating a method of determining a headphone model based on direct current (DC) and/or alternating current (AC) load characteristics of the headphones according to one embodiment of the disclosure.
[0037] FIG. 8 is an example flow chart illustrating a method of measuring alternating current (AC) load characteristics of headphones according to one embodiment of the disclosure.
[0038] FIG. 9 is an example timing diagram illustrating an alternating current (AC) load characteristic measurement for one frequency according to one embodiment of the disclosure.
[0039] FIG. 10 is an example circuit illustrating a digital-to-analog converter (DAC)-based measurement of load characteristics of headphones with an ability to compensate for comparator offset according to one embodiment of the disclosure.
[0040] FIG. 11 is an example flow chart illustrating a method of searching for a generated reference value that approximately equals a voltage across a load that may be used, at least in part, to identify a load according to one embodiment of the disclosure.
[0041] FIG. 12 is an example graph illustrating searching for a generated reference value with a binary search algorithm that approximately equals a voltage across a load that may be used, at least in part, to identify a load according to one embodiment of the disclosure.
[0042] FIG. 13 is an example graph illustrating searching for a generated reference value with a step ramp search algorithm that approximately equals a voltage across a load that may be used, at least in part, to identify a load according to one embodiment of the disclosure.
DETAILED DESCRIPTION
[0043] FIG. 2A is a drawing illustrating an example portable audio device detecting load characteristics of headphones attached to an audio output according to one embodiment of the disclosure. A portable audio device 202, such as a smartphone or MP3 player, may include an application processor, memory, a display, and one or more audio components. The audio components may include an audio codec, a digital signal processor (DSP), an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and/or an amplifier. When a set of headphones 204 is attached to the device 202, the device 202 may detect the connection through an audio plug and determine that headphones, or another transducer or speaker, have been attached. This detection may trigger the device 202, such as through an audio component or the application processor, to determine characteristics of the attached headphones 204. For example, the audio component may perform measurements to determine direct current (DC) or alternating current (AC) load characteristics of the attached headphones 204. In one embodiment, the measurements include a DC impedance, which may be 12 ohms for the headphones 204. This measurement, along with additional information or measurements, may be provided from the audio component to the application processor. The application processor may then compare the measured characteristics to known databases, either stored locally or retrieved from a network location, to identify with particularity the brand, model, or other information regarding the attached headphones 204. In the example of a 12 ohm DC impedance described above, the device 202 may identify the headphones 204 as “Brand B” headphones. The device 202 may then take further action based on the determination regarding the headphones 204. For example, the device 202 may apply equalization levels specifically chosen to improve the sound quality from audio playback through the headphones 204. As another example, the device 202 may adapt audio post-processing for specific original equipment manufacturer (OEM)-bundled and third-party headphones, headsets, Bluetooth™ speakers, and home and auto audio systems.
[0044] One or more measurements of the attached headphones 204 may be performed by a variety of circuitry. For example, a load impedance of the headphones may be measured by circuitry configured to detect an impedance. That circuitry may be coupled to an audio output port of the device 202, such as a headphone plug. In one embodiment, that circuitry may be based on a digital-to-analog converter (DAC) present in an audio codec or other integrated circuit (IC) controller contained in the device 202.
[0045] FIG. 2B is a flow chart illustrating an example method for identifying a load according to one embodiment of the disclosure. The load may be identified by using a search algorithm to control the application signals to the load and/or a reference generator. The search algorithm may be configured as part of a controller, a digital-to-analog converter (DAC), an audio codec, digital logic circuitry, or other circuitry. The search algorithm may be either hard-wired or contained in a computer program product such as software or firmware. A method 250 may begin at block 252 with applying a signal to a load. The signal of block 252 may be, for example, a direct current (DC) and/or alternating current (AC) voltage or current signal. The load may respond to the applied signal, and a characteristic of the load measured at block 254 that corresponds to the load's response. The measured characteristic may be, for example, a voltage across or a current through the load at the applied signal. At block 256, a signal may be applied to a reference generator, which produces a response from the reference generator corresponding to the applied signal. That response may be determined by measuring a characteristic of, such as a voltage across or a current through, the reference generator at block 258 in response to the applied signal.
[0046] The responses of the reference generator and the load to the applied signals of blocks 252 and 256 may be compared at block 260. Based, in part, on the comparison at block 260, a search algorithm may execute to adjust one or more of the applied signals at blocks 252 and 256. For example, the applied signal to the reference generator at block 258 may be increased or decreased until the measured characteristic of the reference generator at block 258 is within a threshold amount of the measured characteristic of the load at block 254. When the threshold is achieved, the search algorithm may identify the load at block 264. Otherwise, one or more steps of method 250 may be repeated until a load is sufficiently identified at block 264. Then, at block 266, an output to a load may be adjusted based on the load identification. For example, as described above with reference to FIG. 2A, when a headphone brand or model is identified, the audio signal output to the headphone may be adjusted to compensate for a frequency response of the headphones. In other embodiments, other transducers, such as a speaker may be identified by the method 250 of FIG. 2B. Although block 260 describes adjusting the signal to the reference generator and fixing the signal applied to the load as part of the process to identify the load, the signal to the load may also be varied and compared to a fixed output of the reference generator.
[0047] FIG. 3A is an example block diagram illustrating an apparatus for identifying a load according to one embodiment of the disclosure. An apparatus for identifying a load 360 may include sense circuitry 320 coupled to the load 360 for measuring a characteristic of the load 360. The measured characteristic may be provided to an analog-to-digital converter (ADC) 350. The ADC 350 may also receive a reference signal generated by a reference generator 338. The reference generator 338 may include, for example, a resistor that converts a current value to a voltage value. The ADC 350 may compare the measured characteristic from the sense circuitry 320 and the reference signal generated by the reference generator 338. In one embodiment, the ADC 350 may be a comparator that receives two analog input signals from the sense circuitry 320 and the reference generator 338 and is configured to output a digital signal indicating which of the two input signals is a higher value. For example, the ADC 350 may output a “0” when the reference signal is lower than the measured characteristic and output a “1” when the reference signal is higher than the measured characteristic.
[0048] The ADC 350 may provide the digital output to digital circuitry 370, such as a controller or another component with logic circuitry. In some embodiments, the digital circuitry 370 may include an input node coupled to a delta-sigma modulator, in which the delta-sigma modulator drives switches (not shown) in the DACs 312 and 332 through an analog fast impulse response (FIR) filter.
[0049] The digital circuitry 370 may be coupled to the first digital-to-analog converter (DAC) 312 and coupled to the second digital-to-analog converter (DAC) 332 and coupled to the analog-to-digital converter (ADC) 350 and configured to control at least one of the first digital-to-analog converter (DAC) 312 and the second digital-to-analog converter (DAC)332 to identify the load. The digital circuitry 370 may control the DACs 312 and 332 to output a signal to the load 360 and/or the reference generator 338 in response to the output of the ADC 350. For example, when the ADC 350 output is “0” the digital circuitry 370 may cause the DAC 332 to increase an amplitude of the signal applied to reference generator 338, and when the ADC 350 output is “1” the digital circuitry 370 may cause the DAC 332 to decrease an amplitude of the signal applied to reference generator 338. In some embodiments, the digital circuitry 370 may control other aspects of DAC 332, such as a frequency of an applied signal. In some embodiments, the digital circuitry 370 may also adjust an output of DAC 312 is response to the output of ADC 350. Further, in some embodiments, the digital circuitry 370 may adjust an output of the DAC 312, such as to control a frequency of a signal applied to the load 360 to measure characteristics of the load 360 at different frequencies. The DACs 312 and 332 may include, for example, a current mode DAC, a voltage mode DAC, and/or an amplifier.
[0050] The digital circuitry 370 may be configured, such as through hard-wiring, firmware, and/or software, to control components to execute a search algorithm to identify a load or characterize the load. For example, the digital circuitry 370 may be configured to control at least one of the first digital-to-analog converter (DAC) and the second digital-to-analog converter (DAC) based on a search algorithm to identify or characterize the load. The search algorithm may include a binary search algorithm, a step ramp search algorithm, other search algorithms, or a combination or sequence of several search algorithms. The digital circuitry 370 may be configured to execute a search algorithm by being configured to operate the first digital-to-analog (DAC) 312 to generate a direct current (DC) signal at the first output node, wherein the analog-to-digital converter (ADC) 350 is configured to generate an output digital signal based, at least in part, on a sensed value measured by the sense circuitry 320; to operate the second digital-to-analog (DAC) 322 to generate, by the reference generator 338, a reference input (V.sub.REF) for the analog-to-digital converter (ADC) 350, wherein the analog-to-digital converter (ADC) 350 is configured to generate the output digital signal based, at least in part, on the reference input V.sub.REF; and to monitor an output of the analog-to-digital converter (ADC) 350 to determine a DC and/or AC impedance of the load 360.
[0051] In one embodiment, the digital circuitry 370 configured to determine at least one characteristic of a load, by performing steps comprising applying a first AC and/or DC signal to the load 360; determining a characteristic (e.g., voltage or current) of the load 360 based on the applied first signal; applying a second signal to the reference generator 338, such as through the digital-to-analog converter (DAC) 332; determining a characteristic (e.g., voltage or current) of the reference generator 338 in response to the applied second signal; comparing the determined characteristics of the load 360 and of the reference generator 338, such as by evaluating an output of the analog-to-digital converter (ADC) 350; and identifying the load 360 based on the compared characteristics of the load 360 and of the reference generator 338.
[0052] One circuit for performing load impedance measurements using current-mode DACs is shown in FIG. 3B. FIG. 3B is an example circuit illustrating a digital-to-analog converter (DAC)-based measurement of load characteristics of headphones according to one embodiment of the disclosure. A circuit 300 includes a first path 310 configured to pass current through an attached load 360, such as headphones attached to the headphone plug. The circuit 300 also includes a second path 330 configured to pass current through a reference component. The output of the first path 310 and the second path 330 is provided to an analog-to-digital converter (ADC) 350, such as an operational amplifier configured as a comparator to produce a digital value corresponding to a comparison of the output of the first path 310 with the output of the second path 330. The ADC 350 may be configured to compare the output from the first path 310, V.sub.L, and the output from the second path 330, V.sub.REF, and generate a signal based on the comparison. That comparison signal may be provided to other circuitry that controls the first path 310 and second path 330 to continue or terminate measurement of the load impedance and to determine characteristics of the load 360. Low pass filters (LPFs) may be coupled between the ADC 350 and the output of paths 310 and 330 to reduce noise in the signals arriving at the ADC 350. A switch 388 may disconnect the first path 310 from the ADC 350. The switch 388 is one example embodiment of the sense circuitry 320, because the switch 388 couples the first output node to the ADC 350 (e.g., comparator 350) to sample a value at the first output node.
[0053] Each of the paths 310 and 330 may be based, in part, on current-mode DACs. Path 310 includes DAC-A 312, and path 330 includes DAC-B 332. Switches 382 and 386 may be coupled to DAC-A 312 and DAC-B 332, respectively, to ground the output of the switches 382 and 386. DAC-A 312 is configured to receive control signal CH1 at node 302 and generate a current that is output to the load 360, Z.sub.L. In one embodiment, the CH1 input may be coupled to circuitry, such as digital circuitry 370 of FIG. 3A. The input of node 302 may be produced by a delta-sigma modulator. A resistor 320 may be coupled in parallel with the load 360 to provide a defined resistance and prevent the load voltage V.sub.L from rising towards infinity, such as would happen when load 360 has a large resistance. The resistor 320 could thus prevent unintentional popping or clicking noises audible from the headphones when the headphone impedance value is large. A switch 384 may also be coupled to output node 306 to ground the output node 306. During normal operation, current from DAC-A 312 may flow through amplifier 314 to an output node 306, such as a headphone port, to drive audio signals to a transducer of load 360. During measurements, the mute switch 316 may be closed to pass current 318 I.sub.L from the DAC-A 312 to the load 360 without passing through the amplifier 314. Current driven through the load 360 generates a voltage, V.sub.L, that may be input to the ADC 350 and used as part of a measurement of the load 360, Z.sub.L. DAC-B 332 is configured to receive a control signal CH2 at input node 304 and generate a current that is output to the reference resistor 338. In one embodiment, the CH2 input may be coupled to circuitry, such as digital circuitry 370 of FIG. 3A. The input at node 304 may be received from a delta-sigma modulator. During normal operation, current from DAC-B 332 may flow through the amplifier 334 to output node 308, such as a headphone port, to drive audio signals to a transducer of the load 360. The output nodes 306 and 308 may thus produce a differential signal for driving a transducer. During measurements, switch 340 may close to couple reference resistor 338 to the DAC-B 332. Current driven across the resistor 338 generates a reference voltage, V.sub.REF, that may be input to the ADC 350 and used as part of a measurement of the load 360, Z.sub.L.
[0054] The circuit 300 illustrates measurement of the load 360 through the first output node 306, HPOUTA, using the first path 310, while using circuitry of the second path 330 as a reference signal. The operation of the first path 310 and the second path 330 may also be reversed, such that the measurement of the load 360 is performed through the second output node 308, HPOUTB.
[0055] The operation of the circuit 300 of FIG. 3, such as control of the DAC-A 312 and DAC-B 332 and monitoring the signal at the output of the ADC 350, may be performed by a controller (not shown). The controller may be integrated into an audio component, such as an audio codec. One method of operating the circuit 300 to measure a characteristic of the load is shown in FIG. 4, which may be executed by the controller. In particular, FIG. 4 illustrates a method of measuring direct current (DC) load characteristics of the load 360, Z.sub.L. However, the controller may measure DC load characteristics and/or other load characteristics through the illustrated method or other methods.
[0056] FIG. 4 is an example flow chart illustrating a method of measuring direct current (DC) load characteristics of headphones according to one embodiment of the disclosure. A method 400 begins at block 402 with ramping the DAC-A 312 to a test current level to generate current that creates a voltage V.sub.L across the load 360. The test current level may be, for example, a current level approximately half way between zero and full scale of the DAC-A 312. The ramp-up may be at a rate slow enough to not generate audible noise from the headphones. Then, at block 404, the test current level may be held by the DAC-A 312 to allow for development of a steady-state response from the load 360. The hold period of block 404 may be a preprogrammed delay value, such as 200 milliseconds, or the circuit 300 may be monitored to determine when steady-state conditions are reached. Next, at block 406, the DAC-B 332 is controlled to generate a current through the reference resistor 338 that results in a reference voltage, V.sub.REF, that may be compared to the load voltage, V.sub.L, by ADC 350. DAC-B 332 may be controlled to vary the current through resistor 338 until a reference voltage V.sub.REF is approximately equal to and greater than the load voltage V.sub.L, which causes the ADC 350 to toggle output signal from low to high or high to low. This change in output signal may be detected to determine that the load voltage V.sub.L has been determined. After block 406 completes, the final current value may be referred to as T.sub.REF, and that value used to compute the impedance of the load 360 ZL by the following equation:
[00001]
where R.sub.REF is the resistance of resistor 320, and I.sub.L is the current applied by DAC-A 312. The manner of varying the current through DAC-B 332 may be performed according to any algorithm, including a step ramp (such as a ramp or a coarse/fine search ramp), a binary search, or other search techniques. After the load voltage V.sub.L has been determined, the method 400 continues to block 408 to ramp down the DAC-A 312 current. The determined V.sub.L voltage level may then be used to determine information regarding the load, such as a DC impedance value, a headphone brand, or headphone model. For example, the determined V.sub.L voltage level may be used to determine a DC impedance of the load by dividing the V.sub.L voltage level by a current produced by DAC-A 312 or some other value. In particular, the V.sub.L voltage level is correlated with the DC impedance of the load Z.sub.L by the following equation:
[00002]
[0057] As described above, one example control method for varying the DAC-B 332 current is a coarse/fine search algorithm. One example of a coarse/fine search algorithm is shown in FIG. 5. FIG. 5 is an example flow chart illustrating a method of measuring direct current (DC) load characteristics of headphones with a coarse and fine stepping according to one embodiment of the disclosure. A method 500 begins at block 502 with ramping up the DAC-B 332 current in coarse steps. The ramp may be conducted at a rate of half a clock cycle of the ADC 350 or in continuous-time. The ramp-up of block 502 continues until the ADC 350 output switches. Then, the value of the DAC-B 332 current is recorded at block 504. This recorded value may provide a coarse estimate of the load impedance, which can be calculated from the following equation:
[00003]
[0058] where R.sub.REF is the resistance of resistor 320, I.sub.L is the current applied by DAC-A 312, and I.sub.REF,coarse is the value recorded at block 504. Next, at block 506, the DAC-B 332 current is reduced from the value recorded at block 504 to switch the comparator output back to the last state. Then, at block 508, the DAC-B 332 current is again ramped up but in smaller steps than that of the ramp-up of block 502. The fine ramp-up of block 508 is continued until the ADC 350 output switches. Next, at block 510, the DAC-B 332 current is recorded at block 510. This recorded value may provide a finer estimate of the load impedance, which can be calculated from the following equation:
[00004]
where R.sub.REF is the resistance of resistor 320, I.sub.L is the current applied by DAC-A 312, and I.sub.REF,fine is the value recorded at block 510. The coarse/fine search algorithm of FIG. 5 may reduce the time consumed in determining the load voltage V.sub.L. The coarse search of blocks 502 and 504 allow for a quick determination of load voltage V.sub.L, and the fine search of blocks 508 and 510 allow for a high precision measurement in a small range of possible load voltage V.sub.L values.
[0059] Another example control method for varying the DAC-B 332 current is a binary search algorithm. A binary search algorithm generally operates by splitting a possible range for the load voltage V.sub.L value into two pieces, testing the midpoint between the two pieces, determining whether the actual load voltage V.sub.L value is higher or smaller than the midpoint, and then taking either of the top half or bottom half and again splitting into two pieces and testing the midpoint. This process continues until the approximate load voltage V.sub.L is determined with a desired level of precision. One example of a binary search algorithm is shown in FIG. 6. FIG. 6 is an example flow chart illustrating a method of measuring direct current (DC) load characteristics of headphones with a binary search according to one embodiment of the disclosure. A method 600 begins at block 602 with setting the DAC-B 332 current to a test current value, such as half scale value. Then, at block 604, it is determined if the ADC 350 output changes. If not, then the actual load voltage V.sub.L value is higher than the test current value. The method 600 thus continues to block 606 to increase the DAC-B 332 current to half way between the full scale current value and the present (test current) current value. If the ADC 350 output changes at block 604, then the actual load voltage V.sub.L value is lower than the test current value. The method 600 thus continues to block 608 to decrease the DAC-B 332 current to half way between zero and the present (test current) current value. At block 610, the binary search algorithm continues as in blocks 604, 606, and 608 until a DAC-B 332 current value is determined to generate a reference voltage V.sub.REF approximately equal to the load voltage V.sub.L.
[0060] The techniques for load characterization described above with reference to FIG. 4, FIG. 5, and FIG. 6 may generally be executed to determine a DC load impedance value for the load 360, Z.sub.L. AC load impedance characteristics may also be measured using the circuit 300, and the results of the DC and AC characteristics combined to improve precision in identifying the load. One identification method using both DC and AC characteristics is illustrated in FIG. 7. FIG. 7 is an example flow chart illustrating a method of determining a headphone model based on direct current (DC) and/or alternating current (AC) load characteristics of the headphones according to one embodiment of the disclosure. A method 700 begins at block 702 with measuring DC load characteristics of the headphones. Block 702 may include executing one or more of the methods described in FIG. 4, FIG. 5, and/or FIG. 6. Then, at block 704, a set of possible headphone models is determined that match the measured DC load characteristic of block 702. When more than one possible headphone models match the measured characteristics of the connected headphones, further characterization of the headphones may be useful in more particularly identifying the headphones. Thus, at block 706, AC load characteristics of the headphones are measured. Block 706 may include multiple AC measurements at different frequencies. In one embodiment, block 706 may continue performing AC measurements until a model of headphone may be determined with sufficient accuracy. Then, at block 708, the set of possible headphone models may be reduced based on the measured AC characteristics of block 706. This may result in reducing the set down to one possible match for headphones. The mobile audio device may then take action based on the determined headphone model at block 708.
[0061] FIG. 8 is an example flow chart illustrating a method of measuring alternating current (AC) load characteristics of headphones according to one embodiment of the disclosure. The AC load characteristic measurement of method 800 may be performed similarly to that of the DC load characteristic measurement of block 702, except by controlling DAC-A 312 to apply an alternating current (AC) signal to the load 360. The method 800 begins at block 802 with applying a sine wave current source from DAC-A 312 to the load with an amplitude of a test current level to generate a voltage across the load. This test current level, applied as current IL to load 360, may generate a voltage across the load 360 calculated by the following equation:
[00005]
At block 804, the DAC-B 332 is set to a predetermined value, such as the DC load detect value measured by the method of FIG. 4, FIG. 5, or FIG. 6. An amplitude of the DC signal generated by the DAC-B 332 may be varied to generate different current levels. Next, at block 806, the DAC-B 332 current is increased or decreased once in each sine wave cycle. At block 808, the DAC-B 332 current level that causes the ADC 350 output to change is recorded as the AC impedance value. The recorded current level, I.sub.REF,AC may be used to calculate the load 360 impedance according to the following equation:
[00006]
where R.sub.REF is the resistance of resistor 320 and I.sub.L is the current applied by DAC-A 312. At block 810, the DAC-B 332 current is varied until a maximum cycle count is reached. At block 812, the DAC-A 312 current is ramped down. The method of FIG. 8 may be repeated for different frequency sine waves generated by the DAC-A 312 and the DAC-B 332. Thus, for example, a frequency response profile of the microphone may be recorded.
[0062] The varying of DAC-B current levels at block 810 may include, for example, executing a binary search algorithm, a peak detection algorithm, or another control technique. A binary search technique in AC detection may consume up to about nine cycles to reach to the final value (within the desired error margin). However, a nine cycle delay is a significant amount of delay at low frequencies. To reduce delay time, a digital peak detect may be performed, in which the DAC-B current is ramped up along a positive slope of the sine wave until the ADC 350 output switches. Thus, instead of causing the reference voltage V.sub.REF to change only once per cycle as with a binary search, the reference voltage V.sub.REF may be increased multiple times or continuously during the sine wave to reach the peak. For low frequencies, this digital peak detect technique may reduce delay to four or five cycles.
[0063] A timing diagram illustrating one AC measurement technique as described using a binary search algorithm above is shown in FIG. 9. FIG. 9 is an example timing diagram illustrating an alternating current (AC) load characteristic measurement for one frequency according to one embodiment of the disclosure. In FIG. 9, graph 902 illustrates a sine wave output of DAC-A 312, which is applied to the load 360 being measured. The applied current to the load 360 creates a load voltage V.sub.L shown in graph 904, which is input to ADC 350. A reference voltage V.sub.REF, also input to the ADC 350 for comparison to the load voltage V.sub.L, is shown in graph 906. The DAC-B 332 output is controlled to obtain desired reference voltages V.sub.REF shown in graph 906. The graph 906 shows the reference voltage V.sub.REF changing once per cycle of the graph 904; however, the V.sub.REF changes may occur less or more frequently. An output of the ADC 350 is shown in graph 908. The switches in the ADC 350 output may be recorded and used to determine a characteristic of the load 360, such as an impedance of the load 360 at the frequency of the sine wave generated by the DAC-A 312.
[0064] The methods of FIG. 4, FIG. 5, FIG. 6, FIG. 7, and FIG. 8 may be executed on circuitry such as that illustrated in FIG. 3. In the circuitry of FIG. 3, a comparator offset may exist. For example, without taking into account the offset the ADC 350 may trip when V.sub.L=V.sub.REF, such that the load 360 can be calculated from the following equation:
[00007]
When a comparator offset, V.sub.OS, is taken into account the ADC 350 may trip when V.sub.L=V.sub.REF−V.sub.OS, such that the load 360 can be calculated from the following equation:
[00008]
With DAC offsets, I.sub.OFF1 and I.sub.OFF2 corresponding to DAC-A and DAC-B offsets, taken into account, the load 360 can be calculated from the following equation:
[00009]
If V.sub.OS=I.sub.OFF2R.sub.REF, then the numerator of the above equation is equal to zero. This can be accomplished in a circuit by passing the current I.sub.OFF2 through R.sub.REF and comparing it against V.sub.OS. A circuit topology for performing such a calibration is shown in FIG. 10.
[0065] FIG. 10 is an example circuit illustrating a digital-to-analog converter (DAC)-based measurement of load characteristics of headphones with an ability to compensate for comparator offset according to one embodiment of the disclosure. Circuit 1000 of FIG. 10 is similar to the circuit 300 of FIG. 3 but includes a switch 1002 coupling one input of the ADC 350 to ground. The switch 1002 may be controlled to cancel the effect of offset in ADC 350. That is, the switch 1002 may be activated to couple one input of the ADC 350 to ground to determine a voltage offset of the ADC 350. Then, that known offset voltage may be compensated for in later measurements, such as measurements of the load voltage V.sub.L. One method for calibrating the circuit to determine the offset may include toggling switch 1002 to ground non-inverting input of the ADC 350 and driving a current from DAC-B 332 through resistance 338. Because the same ADC 350 is used to measure DAC offset, then I.sub.OFF2=V.sub.OS2/R.sub.REF, and then the load 360 may be computed from the following equation:
[00010]
Thus, the comparator offset is cancelled and the only remaining offset is I.sub.OFF1 corresponding to DAC-A, however this can be reduced by a DAC-A offset calibration.
[0066] The search algorithms described above may execute until certain criteria are satisfied. For example, the search algorithm may continue to search and control application of currents to loads until a load has been uniquely determined such that a particular headphone make and model plugged into the headphone port can be identified. As another example, the search algorithm may continue to search and control application of currents to loads until a characteristic of a load has been determined to within a desired error tolerance. That is, the search algorithm may continue until an impedance of a load is determined to within +/−10 Ohms or until an identification of a load is determined to be one of only five possible make and models of headphones. In each of these examples, the search algorithm continues executing until a threshold condition is satisfied, and that threshold condition may be determined based on when a voltage across the load being characterized is approximately equal to a voltage generated by a reference generator. In some embodiments, the search algorithm may terminate in only nine or fewer cycles, thus allowing a measurement of the load relatively quickly, even when characterizing an AC response of the load at low frequencies. One algorithm for determining when to terminate the search algorithm is shown in FIG. 11.
[0067] FIG. 11 is an example flow chart illustrating a method of searching for a generated reference value that approximately equals a voltage across a load that may be used, at least in part, to identify a load according to one embodiment of the disclosure. A method 1100 may begin at block 1102 with digital circuitry causing the application of a periodic signal, such as an alternating current (AC) signal, to a load. For example, digital circuitry 370 may control the first digital-to-analog converter (DAC) 312 to apply a periodic signal to the load 360 of FIG. 3A. At block 1104, digital circuitry may generate a control signal to cause the generation of a reference value by a reference generator. For example, digital circuitry 370 may control the second digital-to-analog converter (DAC) 332 to operate the reference generator 338 of FIG. 3A.
[0068] With the digital-to-analog converters set, values throughout the circuit may be determined. At block 1106, an input value, such as voltage value V.sub.IN across the load, may be determined in response to the applied periodic signal of block 1102. For example, sense circuitry 320 may measure a voltage across the load 360 of FIG. 3A to determine the voltage value V.sub.IN. Although a voltage determination is described, a current determination may also be used to execute a similar search algorithm. Next, at block 1108, the generated reference value may be determined, such as by sampling a voltage across the reference generator. For example, the analog-to-digital converter (ADC) 350 may receive a reference voltage V.sub.REF from the reference generator 338 of FIG. 3A.
[0069] Next, actions for continuing or terminating the search algorithm may be executed based on the measured input value, such as V.sub.IN, and the measured reference value, such as V.sub.REF. The determined values of block 1106 (e.g., V.sub.IN) and 1108 (e.g., V.sub.REF) may be compared at block 1110 and a determination made whether the input value is close enough to the reference value to obtain a desired level of accuracy regarding a characteristic of the load. For example, block 1110 may be performed by determining whether the V.sub.EN value and V.sub.REF value are within 10 mV of each other. This determination may be performed by the analog-to-digital converter (ADC) 350 and a termination indicator signal generated and transmitted to the digital circuitry 370. In one embodiment, the analog-to-digital converter (ADC) 350 may perform the determination using one or more comparators. The analog-to-digital converter (ADC) 350 may also include a comparator that determines when the reference value (e.g., V.sub.REF signal) crosses the input value (e.g., V.sub.IN signal) and generates a comparator trip indicator signal that may be supplied to the digital circuitry 370.
[0070] The digital circuitry 370 may use the comparator trip indicator signal and the termination indicator signal to control the search algorithm and determine when to terminate the search algorithm. For example, if the termination indicator signal is not asserted, then the method 1100 may continue to block 1112 from block 1110. At block 1112, the control signal for generating the reference value may be adjusted in accordance with a search algorithm based on feedback from the comparator trip indicator signal. The control signal may be adjusted to execute, for example, a binary search algorithm, such as shown in FIG. 12, a step ramp search algorithm, such as shown in FIG. 13, or another search algorithm. With the control signal adjusted, the method 1100 may repeat the steps of applying the control signal at block 1104, determining the V.sub.IN value at block 1106, and determining the V.sub.REF value at block 1108, and again determining whether to terminate the search algorithm at block 1110. In some embodiments, the method 1100 may also repeat block 1102 with blocks 1104, 1106, and 1108. When the digital circuitry determines the termination indicator signal is asserted, then the method 1100 may continue from block 1110 to 1114 to end the search algorithm. A characteristic of the load, such as an impedance of the load, may be determined from the current state of the control signal and/or the last generated reference value that was based on the control signal.
[0071] FIG. 12 is an example graph illustrating searching for a generated reference value with a binary search algorithm that approximately equals a voltage across a load that may be used, at least in part, to identify a load according to one embodiment of the disclosure. The graph of FIG. 12 includes a line 1202 representing the V.sub.REF signal determined from the reference generator, a line 1204 representing the V.sub.IN signal determined from the load, a line 1206 representing a comparator trip indicator signal, and a line 1208 representing a termination indicator signal. The lines 1202, 1204, 1206, and 1208 illustrate application of one embodiment of the method of FIG. 11 executing a binary search algorithm. Times 1212, 1214, 1216, and 1218 indicate beginnings of cycles of the periodic signal applied to the load to generate the V.sub.IN signal. At time 1212, the digital circuitry determines no comparator trip signal of line 1206 was asserted during the last cycle and decreases the V.sub.REF signal according to a binary search algorithm. At time 1214, the digital circuitry determines the comparator trip signal of line 1206 was asserted during the last cycle and increases the V.sub.REF signal according to a binary search algorithm. At time 1216, the digital circuitry determines the comparator trip signal of line 1206 was asserted during the last cycle and increases the V.sub.REF signal according to a binary search algorithm. At time 1218, the digital circuitry determines the comparator trip signal of line 1206 was asserted during the last cycle and decreases the V.sub.REF signal according to a binary search algorithm. At time 1222, the digital circuitry determines the termination indicator signal of line 1208 was asserted and terminates the search algorithm. The final value of V.sub.REF at time 1222 at or near the time the termination indicator signal of line 1208 was asserted may be used to determine a characteristic, such as impedance, of the load.
[0072] FIG. 13 is an example graph illustrating searching for a generated reference value with a step ramp search algorithm that approximately equals a voltage across a load that may be used, at least in part, to identify a load according to one embodiment of the disclosure. The graph of FIG. 13 includes a line 1302 representing the V.sub.REF signal determined from the reference generator, a line 1304 representing the V.sub.IN signal determined from the load, a line 1306 representing a comparator trip indicator signal, and a line 1308 representing a termination indicator signal. The lines 1302, 1304, 1306, and 1308 illustrate application of one embodiment of the method of FIG. 11 executing a step ramp search algorithm. Times 1312, 1314, 1316, and 1318 indicate beginnings of cycles of the periodic signal applied to the load to generate the V.sub.IN signal. At time 1312, the digital circuitry determines no comparator trip signal of line 1306 was not asserted during the last cycle and decreases the V.sub.REF signal according to a step ramp search algorithm. At time 1314, the digital circuitry determines no comparator trip signal of line 1306 was not asserted during the last cycle and decreases the V.sub.REF signal according to a step ramp search algorithm. At time 1316, the digital circuitry determines no comparator trip signal of line 1306 was not asserted during the last cycle and decreases the V.sub.REF signal according to a step ramp search algorithm. At time 1318, the digital circuitry determines a comparator trip signal of line 1306 was asserted during the last cycle and increases the V.sub.REF signal according to a step ramp search algorithm. At time 1322, the digital circuitry determines the termination indicator signal of line 1308 was asserted and terminates the search algorithm. The final value of V.sub.REF at time 1322 at or near the time the termination indicator signal of line 1308 was asserted may be used to determine a characteristic, such as impedance, of the load.
[0073] According to certain aspects of the invention and disclosed embodiments of the invention described above, an electronic device may be configured to identify a load coupled to the device. The device may measure direct current (DC) and/or alternating current (AC) characteristics of the load to identify the load. The device may then take action based on the identification of the load. For example, a specific transducer may be identified as coupled to the electronic device and an appropriate equalization curve applied to an audio output of the device. The measurement of characteristics of the load may include controlling a reference generator according to a search algorithm, such as a step ramp or binary search, to identify the load. An analog-to-digital converter (ADC) may operate through the search algorithm to provide feedback to digital circuitry regarding how to proceed through the search algorithm to identify the load.
[0074] The schematic flow chart diagrams of FIG. 2B, FIG. 4, FIG. 5, FIG. 6, FIG. 7 are generally set forth as a logical flow chart diagram. As such, the depicted order and labeled steps are indicative of aspects of the disclosed method. Other steps and methods may be conceived that are equivalent in function, logic, or effect to one or more steps, or portions thereof, of the illustrated method. Additionally, the format and symbols employed are provided to explain the logical steps of the method and are understood not to limit the scope of the method. Although various arrow types and line types may be employed in the flow chart diagram, they are understood not to limit the scope of the corresponding method. Indeed, some arrows or other connectors may be used to indicate only the logical flow of the method. For instance, an arrow may indicate a waiting or monitoring period of unspecified duration between enumerated steps of the depicted method. Additionally, the order in which a particular method occurs may or may not strictly adhere to the order of the corresponding steps shown.
[0075] If implemented in firmware and/or software, functions described above may be stored as one or more instructions or code on a computer-readable medium. Examples include non-transitory computer-readable media encoded with a data structure and computer-readable media encoded with a computer program. Computer-readable media includes physical computer storage media. A storage medium may be any available medium that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise random access memory (RAM), read-only memory (ROM), electrically-erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Disk and disc includes compact discs (CD), laser discs, optical discs, digital versatile discs (DVD), floppy disks and Blu-ray discs. Generally, disks reproduce data magnetically, and discs reproduce data optically. Combinations of the above should also be included within the scope of computer-readable media.
[0076] In addition to storage on computer readable medium, instructions and/or data may be provided as signals on transmission media included in a communication apparatus. For example, a communication apparatus may include a transceiver having signals indicative of instructions and data. The instructions and data are configured to cause one or more processors to implement the functions outlined in the claims.
[0077] Although the present disclosure and certain representative advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the disclosure as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the present disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.
